diff options
author | Gaurav Sarode <gsarode@nvidia.com> | 2011-08-30 16:43:59 +0530 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:50 -0800 |
commit | f96b3a168c256f68e1fa518a4df0b7d95ce45042 (patch) | |
tree | 6944cb82efac8a10d8b7f21e6d84db195591d893 /arch/arm/mach-tegra/tegra3_dvfs.c | |
parent | 94dafa569ff8b145e03190514cb1f5c014a6537e (diff) |
arm: tegra3: Enable CORE and CPU DVFS
Change-Id: I2ceb5ea62c4f8bcc4b4bafc5f842cc2407d172f4
Reviewed-on: http://git-master/r/49831
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R58663a817de5900221291ff8aef5f199223549e3
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_dvfs.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra3_dvfs.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index a4d63857e857..bfab1961bd30 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -133,7 +133,6 @@ static struct dvfs_relationship tegra3_dvfs_relationships[] = { } static struct dvfs cpu_dvfs_table[] = { -#if 0 /* Cpu voltages (mV): 750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150*/ CPU_DVFS("cpu_g", 0, 0, MHZ, 1, 1, 1, 1, 684, 684, 817, 817, 817, 1026, 1102, 1149, 1187, 1225, 1282, 1300), CPU_DVFS("cpu_g", 0, 1, MHZ, 1, 1, 1, 1, 807, 807, 948, 948, 948, 1117, 1171, 1206, 1300), @@ -153,7 +152,6 @@ static struct dvfs cpu_dvfs_table[] = { CPU_DVFS("cpu_g", 3, 2, MHZ, 1, 1, 1, 1, 720, 720, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400), CPU_DVFS("cpu_g", 3, 3, MHZ, 1, 1, 1, 1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400), -#endif /* * "Safe entry" to be used when no match for chip speedo, process * corner is found (just to boot at low rate); must be the last one @@ -174,7 +172,6 @@ static struct dvfs cpu_dvfs_table[] = { } static struct dvfs core_dvfs_table[] = { -#if 0 /* Core voltages (mV): 1000, 1050, 1100, 1150, 1200, 1250, 1300 */ /* Clock limits for internal blocks, PLLs */ CORE_DVFS("cpu_lp", 0, 1, KHZ, 294000, 342000, 427000, 475000, 500000, 500000, 500000), @@ -261,7 +258,6 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("disp2", 0, 0, KHZ, 120000, 120000, 120000, 120000, 190000, 190000, 190000), CORE_DVFS("disp2", 1, 0, KHZ, 151000, 268000, 268000, 268000, 268000, 268000, 268000), CORE_DVFS("disp2", 2, 0, KHZ, 151000, 268000, 268000, 268000, 268000, 268000, 268000), -#endif }; |