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authorAlex Frid <afrid@nvidia.com>2012-11-17 22:46:16 -0800
committerRohan Somvanshi <rsomvanshi@nvidia.com>2012-11-21 09:09:45 -0800
commit6ed8068de3e30d50c4d695f9cb4bf093b864a24f (patch)
tree110ca935ac24d0a0a58d2262f23884ac201f65e7 /arch/arm/mach-tegra/tegra3_dvfs.c
parente51e19ba8d2e94a0d05eb3cf4ff251df79774836 (diff)
ARM: tegra: dvfs: Don't set common core edp default voltage
Removed 1.2V default core edp voltage setting from common code. Let Tegra family specific dvfs layers to set different defaults: 1.2V for Tegra3, and 1.1V for Tegra11 (Tegra2 does not support core edp limits at all). Change-Id: I4b3a2a5d9e61ee4dcce80eca473d4a8de496df3c Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/164580 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_dvfs.c')
-rw-r--r--arch/arm/mach-tegra/tegra3_dvfs.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c
index 002282eedc7d..bf2ae2f34381 100644
--- a/arch/arm/mach-tegra/tegra3_dvfs.c
+++ b/arch/arm/mach-tegra/tegra3_dvfs.c
@@ -668,15 +668,17 @@ static int __init get_core_nominal_mv_index(int speedo_id)
{
int i;
int mv = tegra_core_speedo_mv();
- int core_edp_limit = get_core_edp();
+ int core_edp_voltage = get_core_edp();
/*
* Start with nominal level for the chips with this speedo_id. Then,
* make sure core nominal voltage is below edp limit for the board
* (if edp limit is set).
*/
- if (core_edp_limit)
- mv = min(mv, core_edp_limit);
+ if (!core_edp_voltage)
+ core_edp_voltage = 1200; /* default 1.2V EDP limit */
+
+ mv = min(mv, core_edp_voltage);
/* Round nominal level down to the nearest core scaling step */
for (i = 0; i < core_dvfs_data->num_voltages; i++) {