diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-02-17 23:25:06 -0800 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-03-13 15:30:38 -0700 |
| commit | 86ce551a4633f387fc401c89f6bb97059d3ad75b (patch) | |
| tree | 012e5c59d0c42eb5ad0767d822224b4b0b176076 /arch/arm/mach-tegra/tegra3_emc.h | |
| parent | a760dd3c9bb139e1abe65e28d6bc619fbf267d2a (diff) | |
ARM: tegra: clock: Add SoC-to-DDR bit swap support
Since Tegra3 allows bit swapping when routing SoC-to-DDR data bus,
added the respective decoding mechanism for reading LPDDR2 mode
registers. Populated mapping table for PM269 board.
Bug 939626
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 5f5329596167681b528c87fd088d60030eee6fdc)
Change-Id: I6670110a828df4264b8f7a8c8e6e67611a830033
Reviewed-on: http://git-master/r/89350
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_emc.h')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_emc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_emc.h b/arch/arm/mach-tegra/tegra3_emc.h index 48b2d9cbe78a..cfde92c1355a 100644 --- a/arch/arm/mach-tegra/tegra3_emc.h +++ b/arch/arm/mach-tegra/tegra3_emc.h @@ -54,6 +54,7 @@ struct clk; void tegra_init_emc(const struct tegra_emc_table *table, int table_size); +void tegra_init_dram_bit_map(const u32 *bit_map, int map_size); void tegra_emc_dram_type_init(struct clk *c); int tegra_emc_get_dram_type(void); int tegra_emc_get_dram_temperature(void); @@ -158,7 +159,8 @@ enum { #define EMC_MRR_MA_SHIFT 16 #define EMC_MRR_MA_MASK (0xFF << EMC_MRR_MA_SHIFT) #define EMC_MRR_DATA_MASK ((0x1 << EMC_MRR_MA_SHIFT) - 1) -#define LPDDR2_MR4_TEMP_MASK 0x7 +#define LPDDR2_MR4_TEMP_SHIFT 0 +#define LPDDR2_MR4_TEMP_MASK (0x7 << LPDDR2_MR4_TEMP_SHIFT) #define EMC_XM2DQSPADCTRL3 0xf8 #define EMC_XM2DQSPADCTRL3_VREF_ENABLE (0x1 << 5) |