diff options
| author | Gary King <gking@nvidia.com> | 2010-04-14 20:11:24 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-04-15 20:09:05 -0700 |
| commit | 69171ba958a221624ccabf08a9cde5ff03b51cf1 (patch) | |
| tree | 7280a0980cc1496eeddab24ca0ba711114025198 /arch/arm/mach-tegra/timer.c | |
| parent | 42705eb0a3d53b5c23f9ea439e97099b66320703 (diff) | |
[ARM] tegra: add LP2 idle-mode support
LP2 idle mode power-gates the main CPU complex, requiring a
full processor state save and restore from a reset vector
processor context area is allocated during platform initialization
from the kernel, and mapped into the hotplug page tables (which also
serve as the initial page tables for the LP2 main processor reset)
restoring the processor from LP2 requires calculation of a system-
and APB-clock-dependent CPU power good timer value. on Harmony,
2ms is a good baseline value for this, and the APB clock is running at
13.5MHz. these values need to be un-hardcoded for other platforms.
Change-Id: I70a18a1d995e1d34da64d60fbdcd4568ef442f0c
Diffstat (limited to 'arch/arm/mach-tegra/timer.c')
| -rw-r--r-- | arch/arm/mach-tegra/timer.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 5fbf8acf76bb..8b5fe7957969 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -185,6 +185,12 @@ static void __init tegra_init_timer(void) BUG(); } + ret = setup_irq(tegra_lp2wake_irq.irq, &tegra_lp2wake_irq); + if (ret) { + printk(KERN_ERR "Failed to register LP2 timer IRQ: %d\n", ret); + BUG(); + } + tegra_clockevent.max_delta_ns = clockevent_delta2ns(0x1fffffff, &tegra_clockevent); tegra_clockevent.max_delta_ns = |