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authorSuresh Mangipudi <smangipudi@nvidia.com>2011-01-18 10:03:50 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:43:28 -0800
commit9cf435905a569be2c9bc8792f8d764a522476376 (patch)
tree51f73a953726838e17edbdb6a67a4ad0aabf9601 /arch/arm/mach-tegra/usb_phy.c
parentc512cbee65cf683102b89ca75aad4cc80efec5bd (diff)
[tegra/usb] Enable USB host.
Enabling USB host. Bug 770363 Reviewed-on: http://git-master/r/15792 (cherry picked from commit b71c1a6c5d22ee6053405cf26520d080e439018c) Original-Change-Id: Iff2c12453cf1efa7ee523d125a3c0b429c292ff2 Reviewed-on: http://git-master/r/16684 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I31ce16b026dc50016aed7fbe1722354c4c061437 Rebase-Id: R2cfdc842f9967d7d922a8fff27d45df322de0449
Diffstat (limited to 'arch/arm/mach-tegra/usb_phy.c')
-rw-r--r--arch/arm/mach-tegra/usb_phy.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 444e5e734ded..7dd243156171 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -296,8 +296,12 @@
#define HOSTPC1_DEVLC 0x1b4
#define HOSTPC1_DEVLC_PHCD (1 << 22)
-#define HOSTPC1_DEVLC_PTS(x) (((x) & 0x1f) << 29)
+#define HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29)
#define HOSTPC1_DEVLC_STS (1 << 28)
+
+#define TEGRA_USB_USBMODE_REG_OFFSET 0x1f8
+#define TEGRA_USB_USBMODE_HOST (3 << 0)
+
#endif
static DEFINE_SPINLOCK(utmip_pad_lock);
@@ -917,15 +921,31 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
if (!phy->initialized) {
phy->initialized = 1;
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
gpio_direction_output(config->reset_gpio, 0);
msleep(5);
gpio_direction_output(config->reset_gpio, 1);
+#endif
}
val = readl(base + USB_SUSP_CTRL);
val |= UHSIC_RESET;
writel(val, base + USB_SUSP_CTRL);
+#ifdef CONFIG_ARCH_TEGRA_3x_SOC
+ val = readl(base + USB_SUSP_CTRL);
+ val |= UTMIP_RESET;
+ writel(val, base + USB_SUSP_CTRL);
+
+ val = readl(base + TEGRA_USB_USBMODE_REG_OFFSET);
+ writel((val | TEGRA_USB_USBMODE_HOST),
+ (base + TEGRA_USB_USBMODE_REG_OFFSET));
+
+ val = readl(base + HOSTPC1_DEVLC);
+ val |= HOSTPC1_DEVLC_PTS(2);
+ writel(val, base + HOSTPC1_DEVLC);
+#endif
+
val = readl(base + ULPI_TIMING_CTRL_0);
val |= ULPI_OUTPUT_PINMUX_BYP | ULPI_CLKOUT_PINMUX_BYP;
writel(val, base + ULPI_TIMING_CTRL_0);
@@ -1339,9 +1359,11 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,
err = -ENXIO;
goto err1;
}
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
tegra_gpio_enable(ulpi_config->reset_gpio);
gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
gpio_direction_output(ulpi_config->reset_gpio, 0);
+#endif
phy->ulpi = otg_ulpi_create(&ulpi_viewport_access_ops, 0);
phy->ulpi->io_priv = regs + ULPI_VIEWPORT;