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authorRakesh Bodla <rbodla@nvidia.com>2011-01-29 09:52:23 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-04-26 15:50:33 -0700
commit91e4503567c38078febe3d5ae607c3821c38837f (patch)
treef53c9cfcd0bd7685fe76ac3429b7b26f77e4adce /arch/arm/mach-tegra/usb_phy.c
parentd38c354fb1f9d50f12ad84fd2fda363ab48a515f (diff)
[tegra-usb] Enable Host mode on USB3 port
Enabling USB host mode support on USB3 port. Original-Change-Id: I2f55960368f87828e7cc7f131636cb0e61efc87a Reviewed-on: http://git-master/r/17556 Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Tested-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I239c52b55bb94dea53d0a3304672b55609ff415d
Diffstat (limited to 'arch/arm/mach-tegra/usb_phy.c')
-rw-r--r--arch/arm/mach-tegra/usb_phy.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 4298c8d961aa..36e8093a7c63 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -299,6 +299,8 @@
#define TEGRA_PMC_USB_AO 0xf0
#define TEGRA_PMC_USB_AO_VBUS_WAKEUP_PD_P0 (1 << 2)
+
+#define ICUSB_CTRL 0x15c
#endif
static DEFINE_SPINLOCK(utmip_pad_lock);
@@ -454,11 +456,6 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy)
clk_enable(phy->pad_clk);
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
- tegra_periph_reset_assert(phy->pad_clk);
- udelay(100);
- tegra_periph_reset_deassert(phy->pad_clk);
-#endif
spin_lock_irqsave(&utmip_pad_lock, flags);
if (utmip_pad_count++ == 0) {
@@ -611,6 +608,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
void __iomem *base = phy->regs;
struct tegra_utmip_config *config = phy->config;
+ utmip_pad_power_on(phy);
val = readl(base + USB_SUSP_CTRL);
val |= UTMIP_RESET;
writel(val, base + USB_SUSP_CTRL);
@@ -667,8 +665,6 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
writel(val, base + USB_SUSP_CTRL);
}
- utmip_pad_power_on(phy);
-
val = readl(base + UTMIP_XCVR_CFG0);
val &= ~(UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
UTMIP_FORCE_PDZI_POWERDOWN | UTMIP_XCVR_SETUP(~0) |
@@ -710,7 +706,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
writel(val, base + USB_SUSP_CTRL);
}
#else
- if (phy->instance == 1) {
+ if ((phy->instance == 1) || (phy->instance == 2)) {
val = readl(base + USB_SUSP_CTRL);
val |= UTMIP_PHY_ENABLE;
writel(val, base + USB_SUSP_CTRL);
@@ -741,6 +737,13 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
writel(val, base + USB_PORTSC1);
}
#else
+ if(phy->instance == 2) {
+ writel(0, base + ICUSB_CTRL);
+
+ val = readl(base + TEGRA_USB_USBMODE_REG_OFFSET);
+ writel((val | TEGRA_USB_USBMODE_HOST),
+ (base + TEGRA_USB_USBMODE_REG_OFFSET));
+ }
val = readl(base + HOSTPC1_DEVLC);
val &= ~HOSTPC1_DEVLC_PTS(~0);
val |= HOSTPC1_DEVLC_STS;