usb: host: tegra: Device detection based on polling

Detect the device connected on USB3 by polling on the
line status.

Bug 865094

Original-Change-Id: Ib464170c2cca66e8682495289aa307d537d1da57
Reviewed-on: http://git-master/r/49135
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>

Rebase-Id: R3fe58b6e5eb4f4b498f6282f9cb346937d45c9b2

1 files changed, 26 insertions, 19 deletions

diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 93d330a91227..c40de4d4d5d7 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -459,10 +459,19 @@
 
 #define UTMIP_UHSIC_STATUS		0x214
 #define UTMIP_WALK_PTR_P2(x)		(((x) & 0x3) << 4)
-#define UTMIP_WAKE_ALARM(inst)	(1 << ((inst) + 16))
-#define UTMIP_WAKE_ALARM_P2			(1 << 18)
-#define UTMIP_WAKE_ALARM_P1			(1 << 17)
-#define UTMIP_WAKE_ALARM_P0			(1 << 16)
+#define UTMIP_USBOP_VAL(inst)		(1 << ((2*(inst)) + 8))
+#define UTMIP_USBOP_VAL_P2		(1 << 12)
+#define UTMIP_USBOP_VAL_P1		(1 << 10)
+#define UTMIP_USBOP_VAL_P0		(1 << 8)
+#define UTMIP_USBON_VAL(inst)		(1 << ((2*(inst)) + 9))
+#define UTMIP_USBON_VAL_P2		(1 << 13)
+#define UTMIP_USBON_VAL_P1		(1 << 11)
+#define UTMIP_USBON_VAL_P0		(1 << 9)
+#define UTMIP_WAKE_ALARM(inst)		(1 << ((inst) + 16))
+#define UTMIP_WAKE_ALARM_P2		(1 << 18)
+#define UTMIP_WAKE_ALARM_P1		(1 << 17)
+#define UTMIP_WAKE_ALARM_P0		(1 << 16)
+
 #endif
 
 /* Common registers */
@@ -1104,7 +1113,6 @@ static void utmip_setup_pmc_wake_detect(struct tegra_usb_phy *phy)
 	val &= ~BIAS_MASTER_PROG_VAL;
 	writel(val, pmc_base + PMC_UTMIP_BIAS_MASTER_CNTRL);
 
-
 	/* program walk sequence, maintain a J, followed by a driven K
 	* to signal a resume once an wake event is detected */
 	val = readl(pmc_base + PMC_SLEEPWALK_REG(inst));
@@ -1214,10 +1222,6 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy, bool is_dpd)
 		val = readl(base + USB_SUSP_CTRL);
 		val |= UTMIP_RESET;
 		writel(val, base + USB_SUSP_CTRL);
-
-		val = readl(base + UTMIP_PMC_WAKEUP0);
-		val |= EVENT_INT_ENB;
-		writel(val, base + UTMIP_PMC_WAKEUP0);
 	}
 #endif
 	utmip_pad_power_off(phy, true);
@@ -2458,18 +2462,25 @@ int __init tegra_usb_phy_init(struct usb_phy_plat_data *pdata, int size)
 	return 0;
 }
 
-int tegra_usb_phy_clear_connect_intr(struct tegra_usb_phy *phy)
+bool tegra_usb_phy_is_device_detected(struct tegra_usb_phy *phy)
 {
-	u32 ret = -EIO;
+	bool ret = 0;
 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
 	void __iomem *pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
-	void __iomem *base = phy->regs;
 	unsigned  int inst = phy->instance;
 	u32 val;
 
+	/* Change wake event to FSK */
+	val = readl(pmc_base + PMC_SLEEP_CFG);
+	val |= UTMIP_WAKE_VAL(phy->instance, WAKE_VAL_FSK);
+	writel(val, pmc_base + PMC_SLEEP_CFG);
+
+	/* The minimum time for the registers to get updated */
+	udelay(130);
+
 	val = readl(pmc_base + UTMIP_UHSIC_STATUS);
-	val &= UTMIP_WAKE_ALARM(inst);
-	if (val) {
+	if ((UTMIP_USBON_VAL(phy->instance) |
+			UTMIP_USBOP_VAL(phy->instance)) &val) {
 		val = readl(pmc_base + PMC_SLEEP_CFG);
 		val &= ~UTMIP_WAKE_VAL(inst, 0x0);
 		val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_NONE);
@@ -2479,15 +2490,11 @@ int tegra_usb_phy_clear_connect_intr(struct tegra_usb_phy *phy)
 		val |= UTMIP_CLR_WAKE_ALARM(inst) | UTMIP_CLR_WALK_PTR(inst);
 		writel(val, pmc_base + PMC_TRIGGERS);
 
-		val = readl(base  + UTMIP_PMC_WAKEUP0);
-		val &= ~EVENT_INT_ENB;
-		writel(val, base  + UTMIP_PMC_WAKEUP0);
-
 		val = readl(pmc_base + PMC_SLEEP_CFG);
 		val &=  ~(UTMIP_MASTER_ENABLE(inst) |UTMIP_FSLS_USE_PMC(inst) |
 			UTMIP_RCTRL_USE_PMC(inst) |UTMIP_TCTRL_USE_PMC(inst));
 		writel(val, pmc_base + PMC_SLEEP_CFG);
-		ret = 0;
+		ret = 1;
 	}
 #endif
 	return ret;