diff options
| author | Jon Mayo <jmayo@nvidia.com> | 2011-08-10 16:16:10 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:15 -0800 |
| commit | 5f9ff000af678fc7944452ee88c2ead6dac139fc (patch) | |
| tree | df4e579735e664ea8040c8221344fa5bcea9a4ea /arch/arm/mach-tegra | |
| parent | 705423629e9e077276609e131cb63dacabbe5664 (diff) | |
ARM: tegra: la: use lower LA for display clients
In order to prevent display underflow until latency allowance scaling is
enabled, use the LA value corresponding to low threshold, instead of max
LA for full FIFO.
Bug 840688
Original-Change-Id: If405e5931b817cdadec0294d487af1a4b921894a
Reviewed-on: http://git-master/r/46342
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Rebase-Id: Rca14600452178655a8864b0b7bc7bf66576b8ca1
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/latency_allowance.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/latency_allowance.c b/arch/arm/mach-tegra/latency_allowance.c index 4c2de2a13fba..ecc1e4dcbb6f 100644 --- a/arch/arm/mach-tegra/latency_allowance.c +++ b/arch/arm/mach-tegra/latency_allowance.c @@ -398,6 +398,11 @@ int tegra_set_latency_allowance(enum tegra_la_id id, la_to_set = (la_to_set < 0) ? 0 : la_to_set; la_to_set = (la_to_set > 255) ? 255 : la_to_set; + /* until display can use latency allowance scaling, use a more + * aggressive LA setting. Bug 862709 */ + if (id >= ID(DISPLAY_0A) && id <= ID(DISPLAY_HCB)) + la_to_set /= 3; + spin_lock(&safety_lock); reg_read = readl(la_info[id].reg_addr); reg_write = (reg_read & ~la_info[id].mask) | |