tegra DFS Clients: Adding DFS tag names for bunch of DFS clients.

This change should help in finding which drivers are sending busy hints at run time.

Bug 475616: All DFS clients should specify client tags while registering with DFS

Change-Id:  Ic46cebba485dfc1e1b546276658bbcf04fe25d6f
Reviewed-on: http://git-master/r/1205
Reviewed-by: Sharad Ranjan <shranjan@nvidia.com>
Tested-by: Sharad Ranjan <shranjan@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

11 files changed, 17 insertions, 1 deletions

diff --git a/arch/arm/mach-tegra/nvddk/nvddk_nand.c b/arch/arm/mach-tegra/nvddk/nvddk_nand.c
index 716dedc54b4b..a1d372cad62e 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_nand.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_nand.c
@@ -3144,6 +3144,7 @@ NvError NvDdkNandOpen(NvRmDeviceHandle hRmDevice, NvDdkNandHandle *phNand)
     // Event semaphore to register with the rm_power module
     NV_CHECK_ERROR_CLEANUP(NvOsSemaphoreCreate(&s_pNandRec->PowerMgmtSema, 0));
     // Register with the rm_power manager
+    s_pNandRec->RmPowerClientId = NVRM_POWER_CLIENT_TAG('N','A','N','D');
     NV_CHECK_ERROR_CLEANUP(NvRmPowerRegister(s_pNandRec->RmDevHandle,
         s_pNandRec->PowerMgmtSema, &(s_pNandRec->RmPowerClientId)));
     // Read the NAND lock cfg before resetting the NAND controller (NAND controller
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c b/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
index 95d92d3c66ce..05827683bfce 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
@@ -550,6 +550,7 @@ NvDdkUsbPhyOpen(
         NV_CHECK_ERROR_CLEANUP(
             NvOsSemaphoreCreate(&pUsbPhy->hPwrEventSem, 0));
 
+        pUsbPhy->RmPowerClientId = NVRM_POWER_CLIENT_TAG('U','S','B','p');
         NV_CHECK_ERROR_CLEANUP(
             NvRmPowerRegister(pUsbPhy->hRmDevice,
             pUsbPhy->hPwrEventSem, &pUsbPhy->RmPowerClientId));
diff --git a/arch/arm/mach-tegra/nvddk/nvsnor_controller.c b/arch/arm/mach-tegra/nvddk/nvsnor_controller.c
index 7be46872db61..ea0131fd8924 100644
--- a/arch/arm/mach-tegra/nvddk/nvsnor_controller.c
+++ b/arch/arm/mach-tegra/nvddk/nvsnor_controller.c
@@ -434,9 +434,12 @@ NvError CreateSnorHandle(
     // Register as the Rm power client
     Error = NvOsSemaphoreCreate(&HandleSnor->hRmPowerEventSema, 0);
     if (!Error)
+    {
+        HandleSnor->RmPowerClientId = NVRM_POWER_CLIENT_TAG('S','N','O','R');
         Error = NvRmPowerRegister(HandleSnor->hRmDevice, 
                         HandleSnor->hRmPowerEventSema,
                         &HandleSnor->RmPowerClientId);
+    }
 
     if (!Error)
         Error =  SetPowerControl(HandleSnor, NV_TRUE);
diff --git a/arch/arm/mach-tegra/nvec/smbus/nvec_i2c_transport.c b/arch/arm/mach-tegra/nvec/smbus/nvec_i2c_transport.c
index 55321d098f04..ec03197f92dc 100644
--- a/arch/arm/mach-tegra/nvec/smbus/nvec_i2c_transport.c
+++ b/arch/arm/mach-tegra/nvec/smbus/nvec_i2c_transport.c
@@ -645,6 +645,7 @@ static NvError HwI2cInitController(NvRmI2cSlaveController* t)
     
     // Enable Clock.
     // Configure Clock.
+    t->I2cPowerClientId = NVRM_POWER_CLIENT_TAG('N','V','E','C');
     NV_CHECK_ERROR_CLEANUP(NvRmPowerRegister(t->hRmDevice, NULL, 
         &t->I2cPowerClientId));
     /* 
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_gpio_vi.c b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_gpio_vi.c
index ac6fc966d44f..c887a592f3f6 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_gpio_vi.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_gpio_vi.c
@@ -92,6 +92,7 @@ NvRmPrivGpioViAcquirePinHandle(
     if (s_PowerClientRefCount == 0)
     {
         // turn on vi clock, reset, and power
+        s_ViPowerID = NVRM_POWER_CLIENT_TAG('V','I',' ',' ');
         status = NvRmPowerRegister(hRm, NULL, &s_ViPowerID);
         if (status != NvSuccess)
             goto power_stuff_failed;
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
index cddeb792ce0a..d948fa6f2b18 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
@@ -376,6 +376,7 @@ NvError NvRmPwmConfig(
         {
             hPwm->PowerEnabled = NV_FALSE;
             // Register with RM power
+            s_PwmPowerID = NVRM_POWER_CLIENT_TAG('P','W','M',' ');
             status = NvRmPowerRegister(hPwm->RmDeviceHandle, NULL, &s_PwmPowerID);
             if (status != NvSuccess)
                 goto fail;
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
index 56352f2d7a26..26fd65121355 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
@@ -1199,7 +1199,10 @@ static NvError CreateSpiSlinkChannelHandle(
 #if !NV_OAL
     // Register slink/spi for Rm power client
     if (!Error)
-        Error = NvRmPowerRegister(hRmSpiSlink->hDevice, NULL, &hRmSpiSlink->RmPowerClientId);
+    {
+       hRmSpiSlink->RmPowerClientId = NVRM_POWER_CLIENT_TAG('S','P','I',' ');
+       Error = NvRmPowerRegister(hRmSpiSlink->hDevice, NULL, &hRmSpiSlink->RmPowerClientId);
+    }
 #endif
 
     // Enable Power/Clock.
diff --git a/arch/arm/mach-tegra/nvrm/io/ap20/ap20rm_pcie.c b/arch/arm/mach-tegra/nvrm/io/ap20/ap20rm_pcie.c
index 47e531386afa..cbd935e83bbe 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap20/ap20rm_pcie.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap20/ap20rm_pcie.c
@@ -722,6 +722,7 @@ NvError NvRmPrivPcieOpen(NvRmDeviceHandle hRm)
     /* Start PCIE refclock (enable PLLE) */
     if (exec == ExecPlatform_Soc)
     {
+        s_PowerClientId = NVRM_POWER_CLIENT_TAG('P','C','I','E');
         if (NvRmPowerRegister(hRm, 0, &s_PowerClientId) != NvSuccess)
             goto fail;
         if (NvRmPowerModuleClockControl(hRm, NvRmPrivModuleID_Pcie, 
diff --git a/arch/arm/mach-tegra/nvrm/io/common/nvrm_i2c.c b/arch/arm/mach-tegra/nvrm/io/common/nvrm_i2c.c
index 21cb61e44013..bfc37c1d2a11 100644
--- a/arch/arm/mach-tegra/nvrm/io/common/nvrm_i2c.c
+++ b/arch/arm/mach-tegra/nvrm/io/common/nvrm_i2c.c
@@ -269,6 +269,8 @@ NvRmI2cOpen(
             if(status)
                 goto fail_1;
         }
+
+        c->I2cPowerClientId = NVRM_POWER_CLIENT_TAG('I','2','C',' ');
         status = NvRmPowerRegister(hRmDevice, NULL, &c->I2cPowerClientId);
         if (status != NvSuccess)
         {
diff --git a/arch/arm/mach-tegra/nvrm/io/common/nvrm_owr.c b/arch/arm/mach-tegra/nvrm/io/common/nvrm_owr.c
index 6334f0722182..5571c64acaf6 100755
--- a/arch/arm/mach-tegra/nvrm/io/common/nvrm_owr.c
+++ b/arch/arm/mach-tegra/nvrm/io/common/nvrm_owr.c
@@ -231,6 +231,7 @@ NvRmOwrOpen(
             goto fail;
         }
 
+        pOwrInfo->OwrPowerClientId = NVRM_POWER_CLIENT_TAG('O','W','R',' ');
         status = 
             NvRmPowerRegister(hRmDevice, NULL, &pOwrInfo->OwrPowerClientId);
         if (status != NvSuccess)
diff --git a/arch/arm/mach-tegra/pci.c b/arch/arm/mach-tegra/pci.c
index 7882082f1a3c..f8317a88c19d 100644
--- a/arch/arm/mach-tegra/pci.c
+++ b/arch/arm/mach-tegra/pci.c
@@ -268,6 +268,7 @@ static int __init pci_tegra_setup(int nr, struct pci_sys_data *data)
 		return 0;
 	}
 
+        pci_tegra_powerid = NVRM_POWER_CLIENT_TAG('P','C','I',' ');
 	if (NvRmPowerRegister(s_hRmGlobal, 0, &pci_tegra_powerid) != NvSuccess)
 		goto fail;