tegra RM: Tuned DVFS NRT starvation and LC detection.

- Tuned CPU non real-time starvation (NRT) parameters to increase
DVFS responsiveness: reduced boost degradation rate to 12%/sample
(from 50%/sample); increased initial boost step to 10MHz.
- Updated low corner (LC) detection: dropped activity margin from
corner hit requirements; cut off NRT degradation tail (this should
keep LP2 duty cycle unchanged despite NRT boost increase)

Change-Id: I747e7342cb25d8d103577bd2ad01c92446340f42
Reviewed-on: http://git-master/r/1218
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sharad Ranjan <shranjan@nvidia.com>
Tested-by: Sharad Ranjan <shranjan@nvidia.com>
Reviewed-by: Niranjan Wartikar <nwartikar@nvidia.com>
Tested-by: Niranjan Wartikar <nwartikar@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

2 files changed, 10 insertions, 7 deletions

diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
index 9d5b7431d57a..19881cdddb60 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
+++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
@@ -67,9 +67,9 @@ extern "C"
         128,   /* Proportional frequency boost decrease 128/256 ~ 50% */  \
     },\
     {          /* NRT starvation control parameters */ \
-        4000,  /* Fixed frequency boost increase 4 MHz */ \
+        10000, /* Fixed frequency boost increase 10 MHz */ \
         255,   /* Proportional frequency boost increase 255/256 ~ 100% */ \
-        128,   /* Proportional frequency boost decrease 128/256 ~ 50% */  \
+        32,    /* Proportional frequency boost decrease 32/256 ~ 12% */  \
     },\
     3,      /* Relative adjustement of average freqiency 1/2^3 ~ 12% */ \
     1,      /* Number of smaple intervals with NRT to trigger boost = 2 */ \
diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c b/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c
index 425ad8dcf4e0..0f25159a15f6 100644
--- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c
+++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c
@@ -1109,6 +1109,10 @@ DfsGetTargetFrequencies(
                     pDomainSampler->NrtStarveBoostKHz = (pDomainSampler->NrtStarveBoostKHz *
                      ((0x1 << BOOST_FRACTION_BITS) - pDomainParam->NrtStarveParam.BoostDecKoef))
                       >> BOOST_FRACTION_BITS;
+
+                    if (pDomainSampler->NrtStarveBoostKHz <
+                        pDomainParam->NrtStarveParam.BoostStepKHz)
+                        pDomainSampler->NrtStarveBoostKHz = 0;  // cut tail
                 }
             }
             else if (pDomainSampler->NrtSampleCounter < pDomainParam->MinNrtSamples)
@@ -1206,10 +1210,9 @@ DfsGetTargetFrequencies(
 
         /*
          * Determine if low corner is hit in this domain - clear hit indicator
-         * if new target domain frequency is above low limit (with hysteresis
-         * equal to the 1st NRT starvation step). For platform with dedicated
-         * CPU partition reduce activity margin by half when there is no busy
-         * or starvation requirements
+         * if new target domain frequency is above low limit (with hysteresis)
+         * For platform with dedicated CPU partition do not include activity
+         * margin when there is no busy or starvation requirements
          */
         if (NvRmPrivIsCpuRailDedicated(pDfs->hRm) &&
             (DomainBusyKHz <= LowCornerDomainKHz) &&
@@ -1218,7 +1221,7 @@ DfsGetTargetFrequencies(
             // Multiplying threshold has the same effect as dividing target
             // to reduce margin
             LowCornerDomainKHz +=
-                (LowCornerDomainKHz >> (pDomainParam->RelAdjustBits + 1));
+                (LowCornerDomainKHz >> pDomainParam->RelAdjustBits);
         }
         if ( ((*pDomainKHz) > 
               (LowCornerDomainKHz + pDomainParam->NrtStarveParam.BoostStepKHz))