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authorHoang Pham <hopham@nvidia.com>2010-01-15 14:28:24 -0800
committerHoang Pham <hopham@nvidia.com>2010-01-15 14:28:24 -0800
commitb99caaf13da6d139ffaface3ad63713bca2ac2bd (patch)
treee571ecb2842806915713e79875d7cdf6afad5ee1 /arch/arm/mach-tegra
parent1322a0966db4e854ee6582eea738315be8888556 (diff)
tegra rm PWM: Fix pwm frequency factor between output and input source
to get PWM frequency output more accurate Change-Id: If8b3f741ed001dd93e9bfbbb012bc50f43963e3f
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
index 14c58e4e28f3..b18b9000a393 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/ap15rm_pwm.c
@@ -317,6 +317,7 @@ void NvRmPwmClose(NvRmPwmHandle hPwm)
}
#define MAX_DUTY_CYCLE 255
+#define PWM_FREQ_FACTOR 256
NvError NvRmPwmConfig(
NvRmPwmHandle hPwm,
@@ -386,7 +387,7 @@ NvError NvRmPwmConfig(
if (status != NvSuccess)
goto fail;
- ClockFreqKHz = (RequestedFreqHzOrPeriod * MAX_DUTY_CYCLE) / 1000;
+ ClockFreqKHz = (RequestedFreqHzOrPeriod * PWM_FREQ_FACTOR) / 1000;
if (ClockFreqKHz == 0)
ClockFreqKHz = 1;
@@ -405,7 +406,7 @@ NvError NvRmPwmConfig(
if (status != NvSuccess)
goto fail;
- *pCurrentFreqHzOrPeriod = (ResultFreqKHz * 1000) / MAX_DUTY_CYCLE;
+ *pCurrentFreqHzOrPeriod = (ResultFreqKHz * 1000) / PWM_FREQ_FACTOR;
if (Mode == NvRmPwmMode_Disable)
PwmMode = 0;