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authorAlex Frid <afrid@nvidia.com>2011-04-27 21:26:15 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-05-05 14:19:50 -0700
commit90b64fdd0bf64c0508ab2b14898c9a91c2e5fc4a (patch)
treede19cea0c763b1c04ae9b8795b25ec4b402af91b /arch/arm/mach-tegra
parentaf4c37ad8515796b9822568d8669a99ec0d5910f (diff)
ARM: tegra: clock: Do not keep Tegra3 PLLC always on
Remove PLLC from Tegra3 always on clock list, so it can be disabled, when all its descendants are disabled. Change-Id: I8e91c18cad1df8652d91669917e509b2cae8e57f Reviewed-on: http://git-master/r/29762 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 91a4386b6306..ef9041982aa0 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -78,8 +78,8 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ "pll_p_out3", "pll_p", 72000000, true },
#ifdef CONFIG_ARCH_TEGRA_3x_SOC
{ "pll_m_out1", "pll_m", 275000000, true },
- { "pll_c", NULL, 832000000, true },
- { "pll_c_out1", "pll_c", 278000000, true },
+ { "pll_c", NULL, 832000000, false },
+ { "pll_c_out1", "pll_c", 208000000, false },
{ "pll_p_out4", "pll_p", 108000000, true },
{ "sclk", "pll_p_out4", 108000000, true },
{ "hclk", "sclk", 108000000, true },