diff options
author | Kevin Huang <kevinh@nvidia.com> | 2012-03-13 15:39:52 -0700 |
---|---|---|
committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-03-15 10:03:59 -0700 |
commit | 36222a414b49b3fcbf54abff05a42b20e8c142e8 (patch) | |
tree | cdfd535ec44ce274d0a57acafd5bdacf073e960c /arch/arm/mach-tegra | |
parent | 007991628ad48901cca3750bb824ba31b1c9dc4c (diff) |
arm: tegra: enterprise: Add rated refresh rate for one-shot mode.
Bug 946370
Bug 934977
Change-Id: I33d1b15dc3d7612f44e79da04a13bae6d3446dc7
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89879
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/board-enterprise-panel.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-enterprise-panel.c b/arch/arm/mach-tegra/board-enterprise-panel.c index 9be8582e1be6..fe9186747865 100644 --- a/arch/arm/mach-tegra/board-enterprise-panel.c +++ b/arch/arm/mach-tegra/board-enterprise-panel.c @@ -545,11 +545,17 @@ struct tegra_dsi_out enterprise_dsi = { .n_data_lanes = 2, .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P, #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE) - /* For one-shot mode, mismatch between freq of DC and TE signal - * may cause frame drop. We increase refreash rate a little bit - * more than target value to avoid missing TE signal. + /* For one-shot mode, actual refresh rate is decided by the + * frequency of TE signal. Although the frequency of TE is + * expected running at rated_refresh_rate (typically 60Hz), + * it may vary. Mismatch between freq of DC and TE signal + * would cause frame drop. We increase refresh_rate to the + * value larger than maximum TE frequency to avoid missing + * any TE signal. The value of refresh_rate is also used to + * calculate the pixel clock. */ .refresh_rate = 66, + .rated_refresh_rate = 60, #else .refresh_rate = 60, #endif |