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authorShan Neng Chen <snchen@nvidia.com>2011-03-24 13:50:33 +0800
committerVarun Colbert <vcolbert@nvidia.com>2011-04-13 18:05:01 -0700
commit574e119e6d68811bc34f58c2cf83a860fe17c250 (patch)
treecbe562f1eae8713e34dc86c6d158c9ecd54e62a7 /arch/arm/mach-tegra
parent869ec1ee437d28fb58b9d06b1b0076446fe94d62 (diff)
ARM: tegra: ventana: Fixed the VI GPIO control
Current Ventana flash designed is connected to VI GPIO pin. GPIO can't control as expected if we didn't set it to correct Pinmux group. Change-Id: I77277f268c4086e135c2852bcb5a430bd3a3d2ca Reviewed-on: http://git-master/r/24094 Reviewed-by: Shan Neng Chen (Engrg-HW-Media & Commns Prcsng) <snchen@nvidia.com> Tested-by: Shan Neng Chen (Engrg-HW-Media & Commns Prcsng) <snchen@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/board-ventana-pinmux.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-pinmux.c b/arch/arm/mach-tegra/board-ventana-pinmux.c
index 3fe1bf436fcf..6ed8cfcd5210 100644
--- a/arch/arm/mach-tegra/board-ventana-pinmux.c
+++ b/arch/arm/mach-tegra/board-ventana-pinmux.c
@@ -72,7 +72,7 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
{TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
- {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
+ {TEGRA_PINGROUP_DTE, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},