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authorPeter Chen <peter.chen@freescale.com>2014-02-24 10:21:04 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:16:19 -0600
commit1827c120bb820d886d09263224f68e8121fce679 (patch)
tree930decf8030a3157c15f221cb6ce73ef0cf20a37 /arch/arm/mach-vexpress/ct-ca9x4.c
parent680b01b0944e8bef7ce9c3cf2a076bbd91da1549 (diff)
usb: phy: mxs: Add sync time after controller clear phcd
After clear portsc.phcd, PHY needs 200us stable time for switch 32K clock to AHB clock. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com> [shawn.guo: cherry-pick commit 47d1845ffac0 from upstream]
Diffstat (limited to 'arch/arm/mach-vexpress/ct-ca9x4.c')
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