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| author | Ingo Molnar <mingo@elte.hu> | 2012-03-01 10:26:41 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2012-03-01 10:26:43 +0100 |
| commit | 7e4d960993331e92567f0180e45322a93e6780ba (patch) | |
| tree | 4d7444035303fc0b545e88afbd894176344fb2a3 /arch/arm/mm/Kconfig | |
| parent | de5bdff7a72acc281219be2b8edeeca1fd81c542 (diff) | |
| parent | 164974a8f2a482f1abcb027c6d1a89dd79b14297 (diff) | |
Merge branch 'linus' into sched/core
Merge reason: we'll queue up dependent patches.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 4cefb57d9ed2..7edef9121632 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -631,7 +631,8 @@ comment "Processor Features" config ARM_LPAE bool "Support for the Large Physical Address Extension" - depends on MMU && CPU_V7 + depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ + !CPU_32v4 && !CPU_32v3 help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the @@ -882,6 +883,7 @@ config CACHE_XSC3L2 config ARM_L1_CACHE_SHIFT_6 bool + default y if CPU_V7 help Setting ARM L1 cache line size to 64 Bytes. |