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authorPrem Sasidharan <psasidharan@nvidia.com>2012-07-05 11:56:14 -0700
committerSimone Willett <swillett@nvidia.com>2012-07-19 14:48:09 -0700
commit94e947b829c7922cbc2c413db708232dfc7cc4e9 (patch)
treeae443cd5367b9bd29fb27955951846cdd4f32025 /arch/arm/mm/cache-l2x0.c
parent11d6553a1fa3fe9e0665fe77dd1c2288fe796566 (diff)
arm: tegra: PLLX LP/G ports switching ON/OFF
Enable target PLLX port(LP/G) before cluster switch and disable the previous PLLX port(LP/G) after cluster switch is finished. Seeing a power improvement of ~10mW when core operates at max. voltage and max. frequency. Bug 997358 Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com> Change-Id: I9d05245977f9f63a8f4c53b1c6797118d2d8b903 Reviewed-on: http://git-master/r/113399 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
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