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authorGary King <GKing@nvidia.com>2010-01-29 17:46:27 -0800
committerGary King <GKing@nvidia.com>2010-02-02 10:52:45 -0800
commit40c86b9c228b7b04300c52dd8955e9dc585ba881 (patch)
tree88ceedf3d19c7abc1afb95863a3f193314fbfbf5 /arch/arm/mm/cache-v4wt.S
parent8b8ffa33276fc5b2069a14724ce82cdeaf7e848c (diff)
[ARM] expose full data cache clean and flush DMA maintenance
drivers which perform DMA mapping can optimize necessary cache maintenance by using a full-cache clean or flush rather than looping over large regions line-by-line. there was no previous full-cache operation other than flush_kern_cache_all, and this operation both invalidates the data cache (not always necessary) and invalidates the instruction cache, both of which unnecessarily hurt performance on CPUs with Harvard caches Change-Id: If71015525457e9e7e481fc2afcdc76bc3fa8f8f4
Diffstat (limited to 'arch/arm/mm/cache-v4wt.S')
-rw-r--r--arch/arm/mm/cache-v4wt.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index c54fa2cc40e6..1dfe16103e42 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -184,4 +184,6 @@ ENTRY(v4wt_cache_fns)
.long v4wt_dma_inv_range
.long v4wt_dma_clean_range
.long v4wt_dma_flush_range
+ .long v4wt_flush_kern_cache_all
+ .long v4wt_flush_kern_cache_all
.size v4wt_cache_fns, . - v4wt_cache_fns