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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-07-01 20:43:57 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-07-01 20:43:57 +0100 |
| commit | 3f8efdbe73a5bc96e006b2379a8c8d1d8ef52a9d (patch) | |
| tree | 9171fa7f40177ef34cdcf44b83c9e57687a47ec5 /arch/arm/mm/proc-arm1020.S | |
| parent | a069c896d0d6c028581089da7a9a9037a63c2803 (diff) | |
| parent | 22b1908610dd7ff68471cd4fbd383dbdfe5e0ecd (diff) | |
Merge nommu branch
Diffstat (limited to 'arch/arm/mm/proc-arm1020.S')
| -rw-r--r-- | arch/arm/mm/proc-arm1020.S | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index efeebe77891f..6c731a4f70c9 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -440,11 +440,12 @@ __arm1020_setup: #ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 #endif + + adr r5, arm1020_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm1020_cr1_clear bic r0, r0, r5 - ldr r5, arm1020_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .R.. .... .... .... #endif @@ -456,12 +457,9 @@ __arm1020_setup: * .RVI ZFRS BLDP WCAM * .011 1001 ..11 0101 */ - .type arm1020_cr1_clear, #object - .type arm1020_cr1_set, #object -arm1020_cr1_clear: - .word 0x593f -arm1020_cr1_set: - .word 0x3935 + .type arm1020_crval, #object +arm1020_crval: + crval clear=0x0000593f, mmuset=0x00003935, ucset=0x00001930 __INITDATA |