diff options
| author | Zeng Zhaoming <b32542@freescale.com> | 2011-06-28 09:15:47 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:14:05 +0800 |
| commit | 40412fe345f0cfe5b9f42818832fda6548eef375 (patch) | |
| tree | c636c6bb3850fff8a9009b920bdc0347ca5ecf09 /arch/arm/mm | |
| parent | 84af8b177441450e11f942b26711f3a9812d356a (diff) | |
ENGR00139229-1 MX6: Bring up i.MX6 sabreauto with Single core
MSL code for bring up MX6 sabreauto board with Single core.
Merged from testbuild:imx6_bringup branch.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Singed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Merged-by: Zeng Zhaoming <b32542@freescale.com>
Reviewed-by: Jason Liu <r64343@freescale.com>
Reviewed-by: Frank Li <Frank.Li@freescale.com>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 34 |
2 files changed, 1 insertions, 35 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0074b8dba793..9df1154ae622 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -821,7 +821,7 @@ config CACHE_L2X0 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE + ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || SOC_IMX6Q default y select OUTER_CACHE select OUTER_CACHE_SYNC diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 812be683054f..44c086710d2b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -26,7 +26,6 @@ #define CACHE_LINE_SIZE 32 static void __iomem *l2x0_base; -static unsigned long l2x0_aux; static DEFINE_SPINLOCK(l2x0_lock); static uint32_t l2x0_way_mask; /* Bitmask of active ways */ static uint32_t l2x0_size; @@ -166,18 +165,6 @@ static void l2x0_inv_all(void) spin_unlock_irqrestore(&l2x0_lock, flags); } -static void l2x0_flush_all(void) -{ - unsigned long flags; - - /* clean and invalidate all ways */ - spin_lock_irqsave(&l2x0_lock, flags); - writel(0xff, l2x0_base + L2X0_CLEAN_INV_WAY); - cache_wait(l2x0_base + L2X0_CLEAN_INV_WAY, 0xff); - cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); -} - static void l2x0_inv_range(unsigned long start, unsigned long end) { void __iomem *base = l2x0_base; @@ -305,7 +292,6 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) aux &= aux_mask; aux |= aux_val; - l2x0_aux = aux; /* Determine the number of ways */ switch (cache_id & L2X0_CACHE_ID_PART_MASK) { @@ -365,23 +351,3 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", ways, cache_id, aux, l2x0_size); } - -void l2x0_disable(void) -{ - if (readl(l2x0_base + L2X0_CTRL) - && !(readl(l2x0_base + L2X0_DEBUG_CTRL) & 0x2)) { - l2x0_flush_all(); - writel(0, l2x0_base + L2X0_CTRL); - l2x0_flush_all(); - } -} - -void l2x0_enable(void) -{ - if (!readl(l2x0_base + L2X0_CTRL)) { - writel(l2x0_aux, l2x0_base + L2X0_AUX_CTRL); - l2x0_inv_all(); - /* enable L2X0 */ - writel(1, l2x0_base + L2X0_CTRL); - } -} |