diff options
| author | Gary King <gking@nvidia.com> | 2009-12-15 10:52:51 -0800 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2009-12-15 18:45:06 -0800 |
| commit | 9f2ca31275510d7b1e8aa5c67c097bd08b6e4677 (patch) | |
| tree | f35c351f531a3f4a147a725386e301f2dfcd4a38 /arch/arm/mm | |
| parent | 5e712675183894326ea39f8746334d64da71d1f4 (diff) | |
ARM: specify PMD cacheable attributes correctly for SMP
matches the latest code in korg for declaring PMD attributes properly for
SMP and non-SMP
Change-Id: I35fdb5bd510409525dd2204a4ff2a99c27b04b75
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 6a12d9afd70f..d0934af70a72 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -32,15 +32,11 @@ #ifndef CONFIG_SMP /* PTWs cacheable, inner WB not shareable, outer WB not shareable */ #define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB +#define PMD_FLAGS PMD_SECT_WB #else /* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ #define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA -#endif - -#ifndef CONFIG_SMP -#define TTB_FLAGS TTB_C|TTB_RGN_OC_WB @ mark PTWs cacheable, outer WB -#else -#define TTB_FLAGS TTB_C|TTB_S|TTB_RGN_OC_WBWA @ mark PTWs cacheable and shared, outer WBWA +#define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S #endif ENTRY(cpu_v7_proc_init) @@ -346,10 +342,9 @@ __v7_proc_info: .long 0x000f0000 @ Required ID value .long 0x000f0000 @ Mask for ID .long PMD_TYPE_SECT | \ - PMD_SECT_BUFFERABLE | \ - PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ + PMD_SECT_AP_READ | \ + PMD_FLAGS .long PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ |