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| author | Colin Cross <ccross@android.com> | 2011-08-08 17:16:17 -0700 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2011-08-08 17:16:17 -0700 |
| commit | 468c64fd402ad29dcc8ffbe5b9efb8acf36c7e55 (patch) | |
| tree | 03a80f7a55d53243c3a4e125e51290e76bb9e48a /arch/arm/mm | |
| parent | 9c0f85dc32867c3d0615bcf626321584db801b2f (diff) | |
| parent | ea0dc0dc1c1dca25e50384e300a528db57ee7de5 (diff) | |
Merge commit 'v2.6.39.4' into linux-tegra-2.6.39
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/cache-v6.S | 1 | ||||
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index c96fa1b3f49f..73b4a8b66a57 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S @@ -176,6 +176,7 @@ ENDPROC(v6_coherent_kern_range) */ ENTRY(v6_flush_kern_dcache_area) add r1, r0, r1 + bic r0, r0, #D_CACHE_LINE_SIZE - 1 1: #ifdef HARVARD_CACHE mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index dc18d81ef8ce..d32f02b61866 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -221,6 +221,8 @@ ENDPROC(v7_coherent_user_range) ENTRY(v7_flush_kern_dcache_area) dcache_line_size r2, r3 add r1, r0, r1 + sub r3, r2, #1 + bic r0, r0, r3 1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line add r0, r0, r2 |