diff options
author | Robin Gong <B38343@freescale.com> | 2011-10-31 09:55:25 +0800 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2012-01-09 21:03:28 +0800 |
commit | 1b1025580c14b01efc0ebb25861455191bdb18c8 (patch) | |
tree | 0f5e30f6b7569fae4f61213c90a2cbb070e719c6 /arch/arm/plat-mxc/include/mach/iomux-mx6q.h | |
parent | 8b775bfdd2791d3fdbd2bb851136fe20d64b3d4e (diff) |
ENGR00157253-1 MX6Q spi: add ecspi for MX6Q
1.modify config
2.add board level support ecspi
3.add ecspi pad configure
Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/iomux-mx6q.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx6q.h | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h index 8927779bbb00..778354e1e621 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h @@ -80,6 +80,9 @@ typedef enum iomux_config { #define MX6Q_SPDIF_OUT_PAD_CTRL (PAD_CTL_DSE_120ohm | PAD_CTL_SRE_FAST) +#define MX6Q_ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + #define _MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 \ IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0) #define _MX6Q_PAD_SD2_DAT1__ECSPI5_SS0 \ @@ -3864,7 +3867,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2 \ (_MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_EB2__ECSPI1_SS0 \ - (_MX6Q_PAD_EIM_EB2__ECSPI1_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_EB2__ECSPI1_SS0 | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK \ (_MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_EB2__IPU2_CSI1_D_19 \ @@ -3881,7 +3884,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16 \ (_MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D16__ECSPI1_SCLK \ - (_MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5 \ (_MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D16__IPU2_CSI1_D_18 \ @@ -3896,7 +3899,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17 \ (_MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D17__ECSPI1_MISO \ - (_MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6 \ (_MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK \ @@ -3913,7 +3916,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18 \ (_MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D18__ECSPI1_MOSI \ - (_MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7 \ (_MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D18__IPU2_CSI1_D_17 \ @@ -3930,7 +3933,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19 \ (_MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__ECSPI1_SS1 \ - (_MX6Q_PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 \ (_MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 \ @@ -3938,7 +3941,7 @@ typedef enum iomux_config { #define MX6Q_PAD_EIM_D19__UART1_CTS \ (_MX6Q_PAD_EIM_D19__UART1_CTS | MUX_PAD_CTRL(MX6Q_UART_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__GPIO_3_19 \ - (_MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) + (_MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__EPIT1_EPITO \ (_MX6Q_PAD_EIM_D19__EPIT1_EPITO | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__PL301_MX6QPER1_HRESP \ |