diff options
author | Ian Wisbon <ian.wisbon@timesys.com> | 2011-02-15 15:53:51 -0500 |
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committer | Ian Wisbon <ian.wisbon@timesys.com> | 2011-02-15 15:53:51 -0500 |
commit | dfdbf3f6e2d279f2a46ed95614cb4bf07657394d (patch) | |
tree | 2cc05669c5d3e47f7d4b28e31076b6dc6e771f36 /arch/arm/plat-mxc/include/mach/mxc.h | |
parent | effff5718c380983788fe6c380671c18e15ac7c2 (diff) |
Digi del-5.6 Complete2.6.31-digi-201102151558
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mxc.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index a47e599c54d4..fc466b1c76c3 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -34,6 +34,7 @@ #define MXC_CPU_MX37 37 #define MXC_CPU_MX51 51 #define MXC_CPU_MX53 53 +#define MXC_CPU_MX50 50 #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; @@ -147,6 +148,18 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx53() (0) #endif +#ifdef CONFIG_ARCH_MX50 +# ifdef mxc_cpu_type +# undef mxc_cpu_type +# define mxc_cpu_type __mxc_cpu_type +# else +# define mxc_cpu_type MXC_CPU_MX50 +# endif +# define cpu_is_mx50() (mxc_cpu_type == MXC_CPU_MX50) +#else +# define cpu_is_mx50() (0) +#endif + #define cpu_is_mx32() (0) /* @@ -292,6 +305,7 @@ struct mxc_lightsensor_platform_data { struct mxc_fb_platform_data { struct fb_videomode *mode; + int num_modes; char *mode_str; u32 interface_pix_fmt; }; @@ -306,8 +320,9 @@ struct mxc_lcd_platform_data { struct ccwmx51_lcd_pdata { int vif; struct mxc_fb_platform_data fb_pdata; - void (*reset) (void); - void (*bl_enable) (int); + void (*init) (int); + void (*deinit) (int); + void (*bl_enable) (int, int); }; struct mxc_tsc_platform_data { @@ -346,6 +361,7 @@ struct mxc_camera_platform_data { char *gpo_regulator; u32 mclk; u32 csi; + void (*pwdn) (int pwdn); }; /*gpo1-3 is in fixed state by hardware design, @@ -465,10 +481,20 @@ struct tve_platform_data { char *dig_reg; }; +struct ldb_platform_data { + char *lvds_bg_reg; + u32 ext_ref; +}; + struct mxc_vpu_platform_data { void (*reset) (void); }; +struct mxc_esai_platform_data { + void (*activate_esai_ports) (void); + void (*deactivate_esai_ports) (void); +}; + /* The name that links the i.MX NAND Flash Controller driver to its devices. */ #define IMX_NFC_DRIVER_NAME ("imx_nfc") @@ -649,7 +675,7 @@ void gpio_deactivate_esai_ports(void); #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) #endif -#define cpu_is_mx5() (cpu_is_mx51() || cpu_is_mx53()) +#define cpu_is_mx5() (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx50()) #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) |