diff options
| author | Jason Liu <r64343@freescale.com> | 2012-02-07 14:00:21 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-02-07 16:40:37 +0800 |
| commit | bf915b7e56ee3b17559bf35b03595af9041745cd (patch) | |
| tree | 317a4c76d73b0532bf4750dc2a9a90835d9d06b2 /arch/arm/plat-mxc/include | |
| parent | fac36039b08dc807e7ef9040f25cbcc57ed5331b (diff) | |
ENGR00173869-3: i.mx6: add the cpu_is_mx6dl() support
In order to support one image for i.mx6q and i.mx6dl, we introduce
the below functions by diff the value reading from ANATOP ID register.
cpu_is_mx6q() and cpu_is_mx6dl()
The layout for the register defines:
Major Minor
i.MX6Q1.1: 6300 01
i.MX6Q1.0: 6300 00
i.MX6DL1.0: 6100 00
For the common bits shared across all i.mx6 ports, we can use:
cpu_is_mx6() for it.
Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include')
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/mxc.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 15a82a2a988e..c8f18052c6af 100755 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007, 2012 Freescale Semiconductor, Inc. + * Copyright 2004-2007, 2011-2012 Freescale Semiconductor, Inc. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) * * This program is free software; you can redistribute it and/or @@ -36,6 +36,8 @@ #define MXC_CPU_MX50 50 #define MXC_CPU_MX51 51 #define MXC_CPU_MX53 53 +#define MXC_CPU_MX6Q 63 +#define MXC_CPU_MX6DL 61 #define IMX_CHIP_REVISION_1_0 0x10 #define IMX_CHIP_REVISION_1_1 0x11 @@ -218,22 +220,20 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx53() (0) #endif -#ifndef __ASSEMBLY__ - #ifdef CONFIG_SOC_IMX6Q -#define cpu_is_mx6q() (1) +# define mxc_cpu_type __mxc_cpu_type +# define cpu_is_mx6q() (mxc_cpu_type == MXC_CPU_MX6Q) +# define cpu_is_mx6dl() (mxc_cpu_type == MXC_CPU_MX6DL) +#else +# define cpu_is_mx6q() (0) +# define cpu_is_mx6dl() (0) +#endif #ifndef __ASSEMBLY__ +#ifdef CONFIG_SOC_IMX6Q extern int mx6q_revision(void); -#endif - #else -#define cpu_is_mx6q() (0) - -#ifndef __ASSEMBLY__ -#define mx6q_revision(void) (0) -#endif - +#define mx6q_revision(void) (0) #endif struct cpu_op { @@ -274,6 +274,7 @@ extern int tzic_enable_wake(int is_idle); #define cpu_is_mx5() (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx50()) #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) +#define cpu_is_mx6() (cpu_is_mx6q() || cpu_is_mx6dl()) #define MXC_PGCR_PCR 1 #define MXC_SRPGCR_PCR 1 |