diff options
| author | Robby Cai <R63905@freescale.com> | 2012-02-13 16:46:52 +0800 |
|---|---|---|
| committer | Robby Cai <R63905@freescale.com> | 2012-02-14 23:32:36 +0800 |
| commit | 229b256df8f214b75fa275b61575dc9930931c9d (patch) | |
| tree | 9fe0b8409e1e733efd05b80cbedf72d5aaef56b1 /arch/arm/plat-mxc/include | |
| parent | 322e0ae4bff56cbde45fea9ce0728018e9fa2292 (diff) | |
ENGR00174299-2: MSL part: add ePxP V2 driver
MSL part for ePxP v2 driver
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/dma.h | 5 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx6.h | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h index 321ced11c71d..ee3b962eeb4d 100644 --- a/arch/arm/plat-mxc/include/mach/dma.h +++ b/arch/arm/plat-mxc/include/mach/dma.h @@ -71,6 +71,11 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan) return !strcmp(dev_name(chan->device->dev), "ipu-core"); } +static inline int imx_dma_is_pxp(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "imx-pxp"); +} + static inline int imx_dma_is_general_purpose(struct dma_chan *chan) { return !strcmp(dev_name(chan->device->dev), "imx-sdma") || diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h index c60a84034990..d4b31eaeb60c 100644 --- a/arch/arm/plat-mxc/include/mach/mx6.h +++ b/arch/arm/plat-mxc/include/mach/mx6.h @@ -183,7 +183,7 @@ #define DCIC1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x64000) #define DCIC2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x68000) #define MX6Q_SDMA_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x6C000) -#define MX6DL_PXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) +#define MX6DL_EPXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) #define MX6DL_EPDC_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x74000) #define MX6DL_LCDIF_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x78000) #define MX6Q_DVFSCORE_BASE_ADDR (GPC_BASE_ADDR + 0x180) @@ -395,7 +395,7 @@ #define MXC_INT_CHEETAH_TRIGGER 127 #define MXC_INT_SRC_CPU_WDOG 128 #define MX6DL_INT_EPDC 129 -#define MX6DL_INT_PXP 130 +#define MX6DL_INT_EPXP 130 #define MXC_INT_INTERRUPT_131_NUM 131 #define MXC_INT_CSI_INTR1 132 #define MXC_INT_CSI_INTR2 133 |