Quartz: Added Support for Quartz Hardware Modules

2 files changed, 125 insertions, 2 deletions

diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
index 215f3b6157bb..88c6c8c7ab60 100755
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
@@ -113,6 +113,9 @@ const struct imx_imx_i2c_data mvf_i2c_data[] __initconst = {
 #define mvf_i2c_data_entry(_id, _hwid)				\
 	imx_imx_i2c_data_entry(MVF, _id, _hwid, SZ_4K)
 	mvf_i2c_data_entry(0, 0),
+	mvf_i2c_data_entry(1, 1),
+	mvf_i2c_data_entry(2, 2),
+	mvf_i2c_data_entry(3, 3),
 };
 #endif
 struct platform_device *__init imx_add_imx_i2c(
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
index b1bbb0955010..d230fa34ff39 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
@@ -62,7 +62,9 @@ typedef enum iomux_config {
 
 #define MVF600_HIGH_DRV		PAD_CTL_DSE_150ohm
 
-#define MVF600_DCU_PAD_CTRL	(MVF600_HIGH_DRV | PAD_CTL_OBE_ENABLE)
+#define MVF600_DCU_PAD_CTRL	(PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_FAST | \
+				PAD_CTL_DSE_20ohm | PAD_CTL_PUS_100K_DOWN | PAD_CTL_OBE_ENABLE)
+
 
 #define MVF600_UART_PAD_CTRL	(PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
 				PAD_CTL_DSE_25ohm)
@@ -74,6 +76,8 @@ typedef enum iomux_config {
 		PAD_CTL_ODE | PAD_CTL_DSE_25ohm)
 #define MVF600_FTM1_CH_CTRL      (PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE | \
 		PAD_CTL_DSE_25ohm)
+#define MVF600_FTM3_CH_CTRL	(PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE | \
+		PAD_CTL_ODE | PAD_CTL_DSE_25ohm)
 /*SDHC1*/
 #define MVF600_PAD14_PTA24__SDHC1_CLK				\
 		IOMUX_PAD(0x0038, 0x0038, 5, 0x0000, 0, MVF600_SDHC_PAD_CTRL)
@@ -91,6 +95,15 @@ typedef enum iomux_config {
 #define MVF600_PAD134_PTA7__SDHC1_SW_CD			\
 		IOMUX_PAD(0x0218, 0x0218, 0, 0x0000, 0, \
 				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD98_PTB28__SDHC1_WP			\
+		IOMUX_PAD(0x0188, 0x0188, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD124_PTE19__SDHC1_CD			\
+		IOMUX_PAD(0x01F0, 0x01F0, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD126_PTE21__SDHC1_CD			\
+		IOMUX_PAD(0x01F8, 0x01F8, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
 
 /*I2C0*/
 #define MVF600_PAD36_PTB14__I2C0_SCL				\
@@ -100,11 +113,63 @@ typedef enum iomux_config {
 		IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, \
 				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
 
+/*I2C3*/
+#define MVF600_PAD20_PTA30__I2C3_SCL				\
+		IOMUX_PAD(0x0050, 0x0050, 5, 0x0000, 0, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+#define MVF600_PAD21_PTA31__I2C3_SDA				\
+		IOMUX_PAD(0x0054, 0x0054, 5, 0x0000, 0, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+
+/*I2C2*/
+#define MVF600_PAD66_PTD28__I2C2_SCL				\
+		IOMUX_PAD(0x0108, 0x0108, 3, 0x034C, 1, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+#define MVF600_PAD67_PTD27__I2C2_SDA				\
+		IOMUX_PAD(0x010C, 0x010C, 3, 0x0350, 1, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+
+/*I2C1*/
+#define MVF600_PAD132_PTE27__I2C1_SCL				\
+		IOMUX_PAD(0x0210, 0x0210, 5, 0x0344, 3, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+#define MVF600_PAD133_PTE28__I2C1_SDA				\
+		IOMUX_PAD(0x0214, 0x0214, 5, 0x0348, 3, \
+				MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+
+/*TODO: Add appropriate pad configuration for CAN*/
+#if 0
+/*CAN0*/
+#define MVF600_PAD36_PTB14__CAN0_RX				\
+		IOMUX_PAD(0x0090, 0x0090, 1, 0x0000, 0, 0)
+#define MVF600_PAD37_PTB15__CAN0_TX				\
+		IOMUX_PAD(0x0094, 0x0094, 1, 0x0000, 0, 0)
+#define MVF600_PAD40_PTB18__CAN0_MODE			\
+		IOMUX_PAD(0x00A0, 0x00A0, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
 /*CAN1*/
 #define MVF600_PAD38_PTB16__CAN1_RX				\
 		IOMUX_PAD(0x0098, 0x0098, 1, 0x0000, 0, 0)
 #define MVF600_PAD39_PTB17__CAN1_TX				\
 		IOMUX_PAD(0x009C, 0x009C, 1, 0x0000, 0, 0)
+#define MVF600_PAD41_PTB19__CAN1_MODE			\
+		IOMUX_PAD(0x00A4, 0x00A4, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#endif
+
+/*DGIO*/
+#define MVF600_PAD42_PTB20__DGIO_IN1			\
+		IOMUX_PAD(0x00A8, 0x00A8, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD43_PTB21__DGIO_IN2			\
+		IOMUX_PAD(0x00AC, 0x00AC, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD44_PTB22__DGIO_OUT1			\
+		IOMUX_PAD(0x00B0, 0x00B0, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD93_PTB23__DGIO_OUT2			\
+		IOMUX_PAD(0x0174, 0x0174, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
 
 /*DSPI0*/
 #define MVF600_PAD41_PTB19__DSPI0_PCS0				\
@@ -239,10 +304,15 @@ typedef enum iomux_config {
 #define MVF600_PAD40_PTB18_EXT_AUDIO_MCLK		\
 		IOMUX_PAD(0x00A0, 0x00A0, 2, 0x02ec, 2, \
 				MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD5_PTA12_EXT_AUDIO_MCLK		\
+		IOMUX_PAD(0x0014, 0x0014, 2, 0x02ec, 1, \
+				MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE)
 
 /*DCU0*/
 #define MVF600_PAD30_PTB8_LCD_ENABLE				\
 		IOMUX_PAD(0x78, 0x78, 0, 0x0000, 0, MVF600_DCU_PAD_CTRL)
+#define MVF600_PAD25_PTB3_LCD_CONTRAST				\
+		IOMUX_PAD(0x64, 0x64, 0, 0x0000, 0, MVF600_DCU_PAD_CTRL)
 #define MVF600_PAD105_PTE0_DCU0_HSYNC				\
 		IOMUX_PAD(0x01A4, 0x01A4, 1, 0x0000, 0, MVF600_DCU_PAD_CTRL)
 #define MVF600_PAD106_PTE1_DCU0_VSYNC				\
@@ -299,8 +369,22 @@ typedef enum iomux_config {
 		IOMUX_PAD(0x0210, 0x0210, 1, 0x0000, 0, MVF600_DCU_PAD_CTRL)
 #define MVF600_PAD133_PTE28_DCU0_B7				\
 		IOMUX_PAD(0x0214, 0x0214, 1, 0x0000, 0, MVF600_DCU_PAD_CTRL)
+#define MVF600_PAD108_PTE3_LVDS_ENABLE			\
+		IOMUX_PAD(0x01B0, 0x01B0, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD116_PTE11_LVDS_BLT_EN			\
+		IOMUX_PAD(0x01D0, 0x01D0, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD118_PTE13_LVDS_BLT_EN			\
+		IOMUX_PAD(0x01D8, 0x01D8, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
+
+/*RTC*/
+#define MVF600_PAD127_PTE22_RTC_INT				\
+		IOMUX_PAD(0x01FC, 0x01FC, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
 
-/*UART1*/
+/*UART*/
 #define MVF600_PAD26_PTB4_UART1_TX				\
 		IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, \
 				MVF600_UART_PAD_CTRL | PAD_CTL_OBE_ENABLE)
@@ -315,6 +399,20 @@ typedef enum iomux_config {
 		IOMUX_PAD(0x0084, 0x0084, 1, 0x0000, 0, \
 				MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE)
 
+#define MVF600_PAD26_PTB4_UART2_TX				\
+		IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, \
+				MVF600_UART_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD27_PTB5_UART3_RX				\
+		IOMUX_PAD(0x006C, 0x006C, 2, 0x037C, 0, \
+				MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+
+#define MVF600_PAD10_PTA20_UART3_TX				\
+		IOMUX_PAD(0x0028, 0x0028, 6, 0x0394, 0, \
+				MVF600_UART_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD11_PTA21_UART3_RX				\
+		IOMUX_PAD(0x002C, 0x002C, 6, 0x0390, 0, \
+				MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+
 /* FlexTimer channel pin */
 #define MVF600_PAD22_PTB0_FTM0CH0		\
 		IOMUX_PAD(0x0058, 0x0058, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL)
@@ -334,10 +432,32 @@ typedef enum iomux_config {
 #define MVF600_PAD31_PTB9_FTM1CH1		\
 	IOMUX_PAD(0x007C, 0x007C, 1, 0x0330, 0, MVF600_FTM1_CH_CTRL)
 
+#define MVF600_PAD65_PTD29_FTM3CH2		\
+		IOMUX_PAD(0x0104, 0x0104, 4, 0x0000, 0, MVF600_FTM3_CH_CTRL)
+#define MVF600_PAD64_PTD30_FTM3CH1		\
+		IOMUX_PAD(0x0100, 0x0100, 4, 0x0000, 0, MVF600_FTM3_CH_CTRL)
+
 /* Touch Screen */
 #define MVF600_PAD21_PTA31_TS_IRQ			\
 		IOMUX_PAD(0x0054, 0x0054, 0, 0x0000, 0, \
 				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD68_PTD26_TS_IRQ			\
+		IOMUX_PAD(0x0110, 0x0110, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD117_PTE12_LVDS_TS_IRQ		\
+		IOMUX_PAD(0x01D4, 0x01D4, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD119_PTE14_LVDS_TS_IRQ		\
+		IOMUX_PAD(0x01DC, 0x01DC, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+
+/*User buttons*/
+#define MVF600_PAD70_PTD24_USER_BTN1			\
+		IOMUX_PAD(0x0118, 0x0118, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD69_PTD25_USER_BTN2			\
+		IOMUX_PAD(0x0114, 0x0114, 0, 0x0000, 0, \
+				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
 
 /*QSPI*/
 #define MVF600_PAD79_PTD0_QSPI0_A_SCK                           \