diff options
author | Frank Li <Frank.Li@freescale.com> | 2010-03-15 18:24:16 +0800 |
---|---|---|
committer | Frank Li <Frank.Li@freescale.com> | 2010-03-16 14:10:51 +0800 |
commit | 62c47beef29bdfe7e2cacf937df7291dbd309c66 (patch) | |
tree | 7c68202daeefe724beaab7208b83cc54a5398711 /arch/arm/plat-mxs | |
parent | 92eeb427e55213d185c4f0ddb53d313ae5a4f776 (diff) |
ENGR00121313-1 MX23 Enable USB host base new MSL
Enable MX23 usb host at new msl, use gpio to control vbus on/off
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxs')
-rw-r--r-- | arch/arm/plat-mxs/include/mach/fsl_usb.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-mxs/regs-usbphy.h | 95 | ||||
-rw-r--r-- | arch/arm/plat-mxs/usb_common.c | 17 | ||||
-rw-r--r-- | arch/arm/plat-mxs/utmixc.c | 30 |
4 files changed, 41 insertions, 109 deletions
diff --git a/arch/arm/plat-mxs/include/mach/fsl_usb.h b/arch/arm/plat-mxs/include/mach/fsl_usb.h index 50a9920c6b39..f88324856fc7 100644 --- a/arch/arm/plat-mxs/include/mach/fsl_usb.h +++ b/arch/arm/plat-mxs/include/mach/fsl_usb.h @@ -58,9 +58,17 @@ static inline void fsl_platform_set_host_mode(struct usb_hcd *hcd) static inline void fsl_platform_set_vbus_power(struct fsl_usb2_platform_data *pdata, int on) { + if (pdata->xcvr_ops && pdata->xcvr_ops->set_vbus_power) + pdata->xcvr_ops->set_vbus_power(pdata->xcvr_ops, pdata, on); } /* Set USB AHB burst length for host */ static inline void fsl_platform_set_ahb_burst(struct usb_hcd *hcd) { } + +void fsl_phy_usb_utmi_init(struct fsl_xcvr_ops *this); +void fsl_phy_usb_utmi_uninit(struct fsl_xcvr_ops *this); +void fsl_phy_set_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on); + diff --git a/arch/arm/plat-mxs/regs-usbphy.h b/arch/arm/plat-mxs/regs-usbphy.h index 5ab0152bc511..cf64bfdab0e6 100644 --- a/arch/arm/plat-mxs/regs-usbphy.h +++ b/arch/arm/plat-mxs/regs-usbphy.h @@ -1,5 +1,7 @@ /* - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Freescale USBPHY Register Definitions + * + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -11,30 +13,24 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. + * + * Xml Revision: 1.52 + * Template revision: 26195 */ #ifndef __ARCH_ARM___USBPHY_H -#define __ARCH_ARM___USBPHY_H 1 +#define __ARCH_ARM___USBPHY_H -#define REGS_USBPHY_BASE (MX28_SOC_IO_VIRT_BASE + 0x7c000) -#define REGS_USBPHY_PHYS (0x8007C000) -#define REGS_USBPHY_SIZE 0x00002000 #define HW_USBPHY_PWD (0x00000000) #define HW_USBPHY_PWD_SET (0x00000004) #define HW_USBPHY_PWD_CLR (0x00000008) #define HW_USBPHY_PWD_TOG (0x0000000c) -#define HW_USBPHY_PWD_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_PWD) -#define HW_USBPHY_PWD_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_PWD_SET) -#define HW_USBPHY_PWD_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_PWD_CLR) -#define HW_USBPHY_PWD_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_PWD_TOG) #define BP_USBPHY_PWD_RSVD2 21 #define BM_USBPHY_PWD_RSVD2 0xFFE00000 @@ -60,14 +56,6 @@ #define HW_USBPHY_TX_SET (0x00000014) #define HW_USBPHY_TX_CLR (0x00000018) #define HW_USBPHY_TX_TOG (0x0000001c) -#define HW_USBPHY_TX_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_TX) -#define HW_USBPHY_TX_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_TX_SET) -#define HW_USBPHY_TX_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_TX_CLR) -#define HW_USBPHY_TX_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_TX_TOG) #define BP_USBPHY_TX_RSVD5 29 #define BM_USBPHY_TX_RSVD5 0xE0000000 @@ -112,14 +100,6 @@ #define HW_USBPHY_RX_SET (0x00000024) #define HW_USBPHY_RX_CLR (0x00000028) #define HW_USBPHY_RX_TOG (0x0000002c) -#define HW_USBPHY_RX_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_RX) -#define HW_USBPHY_RX_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_RX_SET) -#define HW_USBPHY_RX_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_RX_CLR) -#define HW_USBPHY_RX_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_RX_TOG) #define BP_USBPHY_RX_RSVD2 23 #define BM_USBPHY_RX_RSVD2 0xFF800000 @@ -144,24 +124,17 @@ #define HW_USBPHY_CTRL_SET (0x00000034) #define HW_USBPHY_CTRL_CLR (0x00000038) #define HW_USBPHY_CTRL_TOG (0x0000003c) -#define HW_USBPHY_CTRL_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_CTRL) -#define HW_USBPHY_CTRL_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_CTRL_SET) -#define HW_USBPHY_CTRL_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_CTRL_CLR) -#define HW_USBPHY_CTRL_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_CTRL_TOG) #define BM_USBPHY_CTRL_SFTRST 0x80000000 #define BM_USBPHY_CTRL_CLKGATE 0x40000000 #define BM_USBPHY_CTRL_UTMI_SUSPENDM 0x20000000 #define BM_USBPHY_CTRL_HOST_FORCE_LS_SE0 0x10000000 -#define BP_USBPHY_CTRL_RSVD3 14 -#define BM_USBPHY_CTRL_RSVD3 0x0FFFC000 -#define BF_USBPHY_CTRL_RSVD3(v) \ - (((v) << 14) & BM_USBPHY_CTRL_RSVD3) - +#define BM_USBPHY_CTRL_RSVD3 0x08000000 +#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS 0x04000000 +#define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE 0x02000000 +#define BM_USBPHY_CTRL_FSDLL_RST_EN 0x01000000 +#define BM_USBPHY_CTRL_ENVBUSCHG_WKUP 0x00800000 +#define BM_USBPHY_CTRL_ENIDCHG_WKUP 0x00400000 #define BM_USBPHY_CTRL_ENDPDMCHG_WKUP 0x00200000 #define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD 0x00100000 #define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE 0x00080000 @@ -175,7 +148,7 @@ #define BM_USBPHY_CTRL_ENIRQDEVPLUGIN 0x00000800 #define BM_USBPHY_CTRL_RESUME_IRQ 0x00000400 #define BM_USBPHY_CTRL_ENIRQRESUMEDETECT 0x00000200 -#define BM_USBPHY_CTRL_RSVD2 0x00000100 +#define BM_USBPHY_CTRL_RESUMEIRQSTICKY 0x00000100 #define BM_USBPHY_CTRL_ENOTGIDDETECT 0x00000080 #define BM_USBPHY_CTRL_RSVD1 0x00000040 #define BM_USBPHY_CTRL_DEVPLUGIN_POLARITY 0x00000020 @@ -186,8 +159,6 @@ #define BM_USBPHY_CTRL_RSVD0 0x00000001 #define HW_USBPHY_STATUS (0x00000040) -#define HW_USBPHY_STATUS_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_STATUS) #define BP_USBPHY_STATUS_RSVD4 11 #define BM_USBPHY_STATUS_RSVD4 0xFFFFF800 @@ -212,14 +183,6 @@ #define HW_USBPHY_DEBUG_SET (0x00000054) #define HW_USBPHY_DEBUG_CLR (0x00000058) #define HW_USBPHY_DEBUG_TOG (0x0000005c) -#define HW_USBPHY_DEBUG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG) -#define HW_USBPHY_DEBUG_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_SET) -#define HW_USBPHY_DEBUG_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_CLR) -#define HW_USBPHY_DEBUG_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_TOG) #define BM_USBPHY_DEBUG_RSVD3 0x80000000 #define BM_USBPHY_DEBUG_CLKGATE 0x40000000 @@ -262,8 +225,6 @@ #define BM_USBPHY_DEBUG_OTGIDPIOLOCK 0x00000001 #define HW_USBPHY_DEBUG0_STATUS (0x00000060) -#define HW_USBPHY_DEBUG0_STATUS_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG0_STATUS) #define BP_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 26 #define BM_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 0xFC000000 @@ -282,14 +243,6 @@ #define HW_USBPHY_DEBUG1_SET (0x00000074) #define HW_USBPHY_DEBUG1_CLR (0x00000078) #define HW_USBPHY_DEBUG1_TOG (0x0000007c) -#define HW_USBPHY_DEBUG1_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1) -#define HW_USBPHY_DEBUG1_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_SET) -#define HW_USBPHY_DEBUG1_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_CLR) -#define HW_USBPHY_DEBUG1_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_TOG) #define BP_USBPHY_DEBUG1_RSVD1 15 #define BM_USBPHY_DEBUG1_RSVD1 0xFFFF8000 @@ -310,8 +263,6 @@ (((v) << 0) & BM_USBPHY_DEBUG1_DBG_ADDRESS) #define HW_USBPHY_VERSION (0x00000080) -#define HW_USBPHY_VERSION_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_VERSION) #define BP_USBPHY_VERSION_MAJOR 24 #define BM_USBPHY_VERSION_MAJOR 0xFF000000 @@ -330,14 +281,6 @@ #define HW_USBPHY_IP_SET (0x00000094) #define HW_USBPHY_IP_CLR (0x00000098) #define HW_USBPHY_IP_TOG (0x0000009c) -#define HW_USBPHY_IP_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_IP) -#define HW_USBPHY_IP_SET_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_IP_SET) -#define HW_USBPHY_IP_CLR_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_IP_CLR) -#define HW_USBPHY_IP_TOG_ADDR \ - (REGS_USBPHY_BASE + HW_USBPHY_IP_TOG) #define BP_USBPHY_IP_RSVD1 25 #define BM_USBPHY_IP_RSVD1 0xFE000000 diff --git a/arch/arm/plat-mxs/usb_common.c b/arch/arm/plat-mxs/usb_common.c index b6f556866a52..c9a65a0accb2 100644 --- a/arch/arm/plat-mxs/usb_common.c +++ b/arch/arm/plat-mxs/usb_common.c @@ -48,7 +48,6 @@ #include <linux/io.h> #include "regs-usbphy.h" -#ifdef CONFIG_ARCH_MX28 #define MXC_NUMBER_USB_TRANSCEIVER 6 struct fsl_xcvr_ops *g_xc_ops[MXC_NUMBER_USB_TRANSCEIVER] = { NULL }; @@ -95,14 +94,12 @@ EXPORT_SYMBOL(fsl_platform_set_test_mode); void fsl_platform_set_usb_phy_dis(struct fsl_usb2_platform_data *pdata, bool enable) { - void __iomem *ctrl_reg = IO_ADDRESS(pdata->phy_regs + HW_USBPHY_CTRL); - u32 tmp = __raw_readl(ctrl_reg); - if (enable) - tmp |= BM_USBPHY_CTRL_ENHOSTDISCONDETECT; + __raw_writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT, + IO_ADDRESS(pdata->phy_regs) + HW_USBPHY_CTRL_SET); else - tmp &= ~BM_USBPHY_CTRL_ENHOSTDISCONDETECT; - __raw_writel(tmp, ctrl_reg); + __raw_writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT, + IO_ADDRESS(pdata->phy_regs) + HW_USBPHY_CTRL_CLR); } EXPORT_SYMBOL(fsl_platform_set_usb_phy_dis); @@ -307,10 +304,10 @@ int usbotg_init(struct platform_device *pdev) if (pdata->operating_mode == FSL_USB2_DR_HOST) { /* enable FS/LS device */ - tmp = __raw_readl(HW_USBPHY_CTRL_ADDR); + tmp = __raw_readl(IO_ADDRESS(pdata->phy_regs) + HW_USBPHY_CTRL); tmp |= (BM_USBPHY_CTRL_ENUTMILEVEL2 | BM_USBPHY_CTRL_ENUTMILEVEL3); - __raw_writel(tmp, HW_USBPHY_CTRL_ADDR); + __raw_writel(tmp, IO_ADDRESS(pdata->phy_regs) + HW_USBPHY_CTRL); } otg_used++; @@ -378,7 +375,7 @@ int usb_host_wakeup_irq(struct device *wkup_dev) return 0; } EXPORT_SYMBOL(usb_host_wakeup_irq); -#endif + void usb_host_set_wakeup(struct device *wkup_dev, bool para) { } diff --git a/arch/arm/plat-mxs/utmixc.c b/arch/arm/plat-mxs/utmixc.c index 427526c81813..a3b0175a138b 100644 --- a/arch/arm/plat-mxs/utmixc.c +++ b/arch/arm/plat-mxs/utmixc.c @@ -32,33 +32,17 @@ #include <mach/arc_otg.h> #include <asm/mach-types.h> - -static void usb_utmi_init(struct fsl_xcvr_ops *this) -{ -} - -static void usb_utmi_uninit(struct fsl_xcvr_ops *this) -{ -} - -/*! - * set vbus power - * - * @param view viewport register - * @param on power on or off - */ -static void set_power(struct fsl_xcvr_ops *this, - struct fsl_usb2_platform_data *pdata, int on) -{ - -} +extern void fsl_phy_usb_utmi_init(struct fsl_xcvr_ops *this); +extern void fsl_phy_usb_utmi_uninit(struct fsl_xcvr_ops *this); +extern void fsl_phy_set_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on); static struct fsl_xcvr_ops utmi_ops = { .name = "utmi", .xcvr_type = PORTSC_PTS_UTMI, - .init = usb_utmi_init, - .uninit = usb_utmi_uninit, - .set_vbus_power = set_power, + .init = fsl_phy_usb_utmi_init, + .uninit = fsl_phy_usb_utmi_uninit, + .set_vbus_power = fsl_phy_set_power, }; extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); |