diff options
| author | Peter Chen <peter.chen@freescale.com> | 2010-07-23 18:19:33 +0800 |
|---|---|---|
| committer | Lily Zhang <r58066@freescale.com> | 2010-07-26 10:56:09 +0800 |
| commit | 8bf6ade58e901242328dd75670fb328bf9b0bd8a (patch) | |
| tree | 6f53dbf2218df2be7fe3881a98eb763430e0e7d6 /arch/arm/plat-mxs | |
| parent | 079f9fa4e862d6ec40b361217ecebb53a7533fad (diff) | |
ENGR00125518 mx23/mx28: enable internal phy clock for otg port host mode
mx23/mx28 otg port host mode will not enable internal
phy clock (portsc1 PHCD1), in that case, if the user loads
the gadget firstly, then, unloads the gadget module.
The host will not work due to gadget disable internal
phy clock after its unload process, but host doesn't enable it
at its initialization.
This fix will add enable internal phy clock at otg initialization process,
and disable it at de-initialization process.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxs')
| -rw-r--r-- | arch/arm/plat-mxs/usb_common.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/plat-mxs/usb_common.c b/arch/arm/plat-mxs/usb_common.c index 5d8d0b6d9285..fa9466090e34 100644 --- a/arch/arm/plat-mxs/usb_common.c +++ b/arch/arm/plat-mxs/usb_common.c @@ -271,6 +271,10 @@ int usbotg_init(struct platform_device *pdev) xops->init(xops); usb_phy_enable(pdata); } + /* Enable internal Phy clock */ + tmp = __raw_readl(pdata->regs + UOG_PORTSC1); + tmp &= ~PORTSC_PHCD; + __raw_writel(tmp, pdata->regs + UOG_PORTSC1); if (pdata->operating_mode == FSL_USB2_DR_HOST) { /* enable FS/LS device */ @@ -288,11 +292,17 @@ EXPORT_SYMBOL(usbotg_init); void usbotg_uninit(struct fsl_usb2_platform_data *pdata) { + int tmp; pr_debug("%s\n", __func__); if (pdata->xcvr_ops && pdata->xcvr_ops->uninit) pdata->xcvr_ops->uninit(pdata->xcvr_ops); + /* Disable internal Phy clock */ + tmp = __raw_readl(pdata->regs + UOG_PORTSC1); + tmp |= PORTSC_PHCD; + __raw_writel(tmp, pdata->regs + UOG_PORTSC1); + pdata->regs = NULL; otg_used--; } |