summaryrefslogtreecommitdiff
path: root/arch/arm/plat-nomadik/gpio.c
diff options
context:
space:
mode:
authorRabin Vincent <rabin.vincent@stericsson.com>2010-06-02 06:06:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-06-16 22:27:35 +0100
commit378be0663dbb2de033ae7a1231227be09e6ad0a3 (patch)
treecbe2b1728b405236110b8ce68741a44257e7d081 /arch/arm/plat-nomadik/gpio.c
parent6f9a974cf6fdd189ff383c8b75c22c65dab20b52 (diff)
ARM: 6155/1: nomadik-gpio: add pin configuration API
Add a pin configuration API to all pin-related configuration to be specified with a single macro and groups of pins to be configured at one go. Based on the PXA MFP implementation. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-nomadik/gpio.c')
-rw-r--r--arch/arm/plat-nomadik/gpio.c96
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 7b7393f96a9c..465ae5bc00b1 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -23,6 +23,7 @@
#include <linux/irq.h>
#include <linux/slab.h>
+#include <plat/pincfg.h>
#include <mach/hardware.h>
#include <mach/gpio.h>
@@ -95,6 +96,101 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
}
+static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
+ unsigned offset)
+{
+ writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
+}
+
+static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
+ pin_cfg_t cfg)
+{
+ static const char *afnames[] = {
+ [NMK_GPIO_ALT_GPIO] = "GPIO",
+ [NMK_GPIO_ALT_A] = "A",
+ [NMK_GPIO_ALT_B] = "B",
+ [NMK_GPIO_ALT_C] = "C"
+ };
+ static const char *pullnames[] = {
+ [NMK_GPIO_PULL_NONE] = "none",
+ [NMK_GPIO_PULL_UP] = "up",
+ [NMK_GPIO_PULL_DOWN] = "down",
+ [3] /* illegal */ = "??"
+ };
+ static const char *slpmnames[] = {
+ [NMK_GPIO_SLPM_INPUT] = "input",
+ [NMK_GPIO_SLPM_NOCHANGE] = "no-change",
+ };
+
+ int pin = PIN_NUM(cfg);
+ int pull = PIN_PULL(cfg);
+ int af = PIN_ALT(cfg);
+ int slpm = PIN_SLPM(cfg);
+
+ dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n",
+ pin, afnames[af], pullnames[pull], slpmnames[slpm]);
+
+ __nmk_gpio_make_input(nmk_chip, offset);
+ __nmk_gpio_set_pull(nmk_chip, offset, pull);
+ __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
+ __nmk_gpio_set_mode(nmk_chip, offset, af);
+}
+
+/**
+ * nmk_config_pin - configure a pin's mux attributes
+ * @cfg: pin confguration
+ *
+ * Configures a pin's mode (alternate function or GPIO), its pull up status,
+ * and its sleep mode based on the specified configuration. The @cfg is
+ * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
+ * are constructed using, and can be further enhanced with, the macros in
+ * plat/pincfg.h.
+ *
+ * If a pin's mode is set to GPIO, it is configured as an input to avoid
+ * side-effects. The gpio can be manipulated later using standard GPIO API
+ * calls.
+ */
+int nmk_config_pin(pin_cfg_t cfg)
+{
+ struct nmk_gpio_chip *nmk_chip;
+ int gpio = PIN_NUM(cfg);
+ unsigned long flags;
+
+ nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
+ if (!nmk_chip)
+ return -EINVAL;
+
+ spin_lock_irqsave(&nmk_chip->lock, flags);
+ __nmk_config_pin(nmk_chip, gpio - nmk_chip->chip.base, cfg);
+ spin_unlock_irqrestore(&nmk_chip->lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(nmk_config_pin);
+
+/**
+ * nmk_config_pins - configure several pins at once
+ * @cfgs: array of pin configurations
+ * @num: number of elments in the array
+ *
+ * Configures several pins using nmk_config_pin(). Refer to that function for
+ * further information.
+ */
+int nmk_config_pins(pin_cfg_t *cfgs, int num)
+{
+ int ret = 0;
+ int i;
+
+ for (i = 0; i < num; i++) {
+ int ret = nmk_config_pin(cfgs[i]);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL(nmk_config_pins);
+
/**
* nmk_gpio_set_slpm() - configure the sleep mode of a pin
* @gpio: pin number