diff options
author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2010-11-22 17:12:15 -0800 |
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committer | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2010-12-01 12:18:32 +0100 |
commit | 4a25605fb71f02b4f80091df91f777225a0309c5 (patch) | |
tree | 4ba532f527c3e67fa0e511030031ede6d3321145 /arch/arm/plat-pxa | |
parent | 49cbb1e0b6dcba9170e72fdf40c75fc24cadba4b (diff) |
spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Diffstat (limited to 'arch/arm/plat-pxa')
-rw-r--r-- | arch/arm/plat-pxa/include/plat/ssp.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-pxa/include/plat/ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h index fe43150690ed..21c12ca80738 100644 --- a/arch/arm/plat-pxa/include/plat/ssp.h +++ b/arch/arm/plat-pxa/include/plat/ssp.h @@ -82,7 +82,8 @@ #define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */ #define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */ #define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ - +#define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */ +#define SSSR_RFL_MASK (0xf << 12) /* Receive FIFO Level mask */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ #define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ |