diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-03-01 11:11:07 -0800 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-03-01 14:23:58 -0800 |
| commit | 918e6ef3a061cb9f5d5e6117e84e1ef23c2f6a62 (patch) | |
| tree | 5edaeaa235047819ab7750fde32f8265024ac9b1 /arch/arm/plat-s3c64xx | |
| parent | ad63967348e25ad65b4c12b9f5eaa4df43545ff0 (diff) | |
tegra RM: Explicitly set core voltage on LP1 entry.
Explicitly set core voltage when DVFS is suspended to avoid LP1 entry
at high voltage caused by "last minute" system activity.
Change-Id: Iefa6ac3c0c76482871c9cd10d993c03a6a6c00c3
Reviewed-on: http://git-master/r/718
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/plat-s3c64xx')
0 files changed, 0 insertions, 0 deletions