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authorThomas Gleixner <tglx@linutronix.de>2013-05-05 08:24:42 +0200
committerThomas Gleixner <tglx@linutronix.de>2013-05-05 08:27:03 +0200
commitf99e44a7f3352d7131c7526207f153f13ec5acd4 (patch)
tree0f448b21128c478053ee7f7765b865954c4eebe8 /arch/arm/plat-samsung/s5p-dev-mfc.c
parentfd29f424d458118f02e89596505c68a63dcb3007 (diff)
parentce857229e0c3adc211944a13a5579ef84fd7b4af (diff)
Merge branch 'linus' into core/urgent
Update with Linus tree so fixes for the same can be applied. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/plat-samsung/s5p-dev-mfc.c')
-rw-r--r--arch/arm/plat-samsung/s5p-dev-mfc.c42
1 files changed, 41 insertions, 1 deletions
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c
index 5ec104b5408b..a93fb6fb6606 100644
--- a/arch/arm/plat-samsung/s5p-dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -18,10 +18,50 @@
#include <linux/of.h>
#include <mach/map.h>
+#include <mach/irqs.h>
#include <plat/devs.h>
-#include <plat/irqs.h>
#include <plat/mfc.h>
+static struct resource s5p_mfc_resource[] = {
+ [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
+ [1] = DEFINE_RES_IRQ(IRQ_MFC),
+};
+
+struct platform_device s5p_device_mfc = {
+ .name = "s5p-mfc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(s5p_mfc_resource),
+ .resource = s5p_mfc_resource,
+};
+
+/*
+ * MFC hardware has 2 memory interfaces which are modelled as two separate
+ * platform devices to let dma-mapping distinguish between them.
+ *
+ * MFC parent device (s5p_device_mfc) must be registered before memory
+ * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
+ */
+
+struct platform_device s5p_device_mfc_l = {
+ .name = "s5p-mfc-l",
+ .id = -1,
+ .dev = {
+ .parent = &s5p_device_mfc.dev,
+ .dma_mask = &s5p_device_mfc_l.dev.coherent_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+};
+
+struct platform_device s5p_device_mfc_r = {
+ .name = "s5p-mfc-r",
+ .id = -1,
+ .dev = {
+ .parent = &s5p_device_mfc.dev,
+ .dma_mask = &s5p_device_mfc_r.dev.coherent_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+};
+
struct s5p_mfc_reserved_mem {
phys_addr_t base;
unsigned long size;