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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-01-14 22:37:12 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-02 09:35:34 +0100
commitfe8e1a57f0ccdaede41618ca9ced7d746b6298d3 (patch)
treec1056096717f28e5c8c8d59395ca0efff61ca539 /arch/arm/plat-versatile/timer-sp.c
parente388771458b4ff3ad81ab70e390b24d069647da4 (diff)
ARM: Realview/Versatile: remove useless TIMER_RELOAD calculations
Realview/Versatile copied the Integrator timer code, including the calculations for ensuring that the reload value fits into the 16-bit counter. However, these platforms have a 32-bit counter which is clocked at a slower rate. The result is that the preprocessor conditions are never triggered: TICKS_PER_uSEC = 1, mSEC_10 = 10000, which is 0x2710 - less than 0x10000. So, remove the unnecessary complexity, reducing the TIMER_RELOAD calculation to just: TICKS_PER_uSEC * mSEC_10 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-versatile/timer-sp.c')
-rw-r--r--arch/arm/plat-versatile/timer-sp.c12
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/arm/plat-versatile/timer-sp.c b/arch/arm/plat-versatile/timer-sp.c
index 98722f44640c..d1dbef5b17b1 100644
--- a/arch/arm/plat-versatile/timer-sp.c
+++ b/arch/arm/plat-versatile/timer-sp.c
@@ -33,17 +33,7 @@
/*
* How long is the timer interval?
*/
-#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
-#if TIMER_INTERVAL >= 0x100000
-#define TIMER_RELOAD (TIMER_INTERVAL >> 8)
-#define TIMER_DIVISOR (TIMER_CTRL_DIV256)
-#elif TIMER_INTERVAL >= 0x10000
-#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
-#define TIMER_DIVISOR (TIMER_CTRL_DIV16)
-#else
-#define TIMER_RELOAD (TIMER_INTERVAL)
-#define TIMER_DIVISOR (TIMER_CTRL_DIV1)
-#endif
+#define TIMER_RELOAD (TICKS_PER_uSEC * mSEC_10)
static void __iomem *clksrc_base;