diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2006-04-10 21:32:46 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-04-10 21:32:46 +0100 |
| commit | 1356c1948da967bc1d4c663762bfe21dfcec4b2f (patch) | |
| tree | 7d7ddbaa5b9b69b53b9079bd7562eb3daf7682c4 /arch/arm/vfp/vfpsingle.c | |
| parent | bb54a335ae6d282a4f177c7b35cd149aa9b0b9be (diff) | |
[ARM] 3473/1: Use numbers 0-15 for the VFP double registers
Patch from Catalin Marinas
This patch changes the double registers numbering to 0-15 from even 0-30,
in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO
bug (value 16 actually represents the 8th double register with the original
numbering).
The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of
FMRRD/FMDRR. The patch changes to CP11 for the correct instructions.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/vfp/vfpsingle.c')
| -rw-r--r-- | arch/arm/vfp/vfpsingle.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index df6e5e23bccb..4ac27f193934 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c @@ -1193,7 +1193,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, (veclen >> FPSCR_LENGTH_BIT) + 1); - fop = (op == FOP_EXT) ? fop_extfns[sn] : fop_fns[FOP_TO_IDX(op)]; + fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)]; if (!fop) goto invalid; |