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| author | Arnd Bergmann <arnd@arndb.de> | 2019-02-15 15:41:09 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2019-02-15 15:41:29 +0100 |
| commit | 175a366f7036e3210ddd81eb61750ac177413b5e (patch) | |
| tree | 97b5458039b5adc440fac63617209907080df70f /arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | |
| parent | 51098f76dd0a10df51a16a457c0200a692876b17 (diff) | |
| parent | a24270afa7f7ba800567a03ea9d34f500738e4c8 (diff) | |
Merge tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner arm64 DT changes for 5.1, take 2
Our usual round of DT changes for the arm64 Allwinner SoCs:
- Enabling of the various power supplies on most a64 boards
- H6 SRAM controller support
- A64 CSI support
* tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards
arm64: dts: allwinner: a64: teres-i: enable power supplies
arm64: dts: allwinner: h6: Add support for the SRAM C1 section
dt-bindings: sram: sunxi: Add compatible for the H6 SRAM C1
arm64: dts: allwinner: a64: Add A64 CSI controller
arm64: dts: allwinner: h6: Move GIC device node fix base address ordering
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 36 |
1 files changed, 25 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 48e170a2b141..c9e861a50a63 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -167,6 +167,20 @@ reg = <0x0000 0x1e000>; }; }; + + sram_c1: sram@1a00000 { + compatible = "mmio-sram"; + reg = <0x01a00000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01a00000 0x200000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun50i-h6-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x200000>; + }; + }; }; ccu: clock@3001000 { @@ -178,17 +192,6 @@ #reset-cells = <1>; }; - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, - <0x03022000 0x2000>, - <0x03024000 0x2000>, - <0x03026000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - interrupt-controller; - #interrupt-cells = <3>; - }; - pio: pinctrl@300b000 { compatible = "allwinner,sun50i-h6-pinctrl"; reg = <0x0300b000 0x400>; @@ -239,6 +242,17 @@ }; }; + gic: interrupt-controller@3021000 { + compatible = "arm,gic-400"; + reg = <0x03021000 0x1000>, + <0x03022000 0x2000>, + <0x03024000 0x2000>, + <0x03026000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-controller; + #interrupt-cells = <3>; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h6-mmc", "allwinner,sun50i-a64-mmc"; |