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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2016-02-08 11:59:08 -0600
committerOlof Johansson <olof@lixom.net>2016-02-08 13:38:05 -0800
commitc91cb9123cdd5f965ed177620611b06df21eef23 (patch)
tree96de9e8deb93da790f4a2d01c981ddc5cbf316cb /arch/arm64/boot/dts/amd
parent4852773806867374e6e1f941410ac72141fc689d (diff)
dtb: amd: Fix DMA ranges in device tree
Fix DMA ranges of smb0 and pcie0 nodes in AMD Seattle SOC. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts/amd')
-rw-r--r--arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index fdd0c967138e..5c73117f5c7b 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -55,8 +55,12 @@
#size-cells = <2>;
ranges;
- /* DDR range is 40-bit addressing */
- dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ /*
+ * dma-ranges is 40-bit address space containing:
+ * - GICv2m MSI register is at 0xe0080000
+ * - DRAM range [0x8000000000 to 0xffffffffff]
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
/include/ "amd-seattle-clks.dtsi"
@@ -159,7 +163,7 @@
<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
dma-coherent;
- dma-ranges = <0x43000000 0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+ dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges =
/* I/O Memory (size=64K) */
<0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,