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authorJianxin Pan <jianxin.pan@amlogic.com>2018-09-21 16:34:41 +0800
committerKevin Hilman <khilman@baylibre.com>2018-09-26 02:04:58 -0700
commit9c8c52f7cb4f3b604bb9836947dadfbb255f465f (patch)
treecd4b287db5b1dd0a8db13d2a800d08e45e90b21e /arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
parent28c9aa152134521a9dfb56ad02c46f7b99cad3b2 (diff)
arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support
Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
new file mode 100644
index 000000000000..c44dbdddf2cf
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-g12a.dtsi"
+
+/ {
+ compatible = "amlogic,u200", "amlogic,g12a";
+ model = "Amlogic Meson G12A U200 Development Board";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+};
+
+&uart_AO {
+ status = "okay";
+};
+