diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2018-10-16 11:20:28 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:46 +0800 |
commit | 297d6b6e720c1ef2434c46c79ff26df3eabd9492 (patch) | |
tree | 9ab641f7fc0c9de1c5d2eab9749fb018c3a26281 /arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi | |
parent | 73f73e4d11292f0342cdeb747b8c440806f464f1 (diff) |
MLK-19947-3 ARM64: dts: freescale: imx8qxp: add cpu-idle support
This patch adds cpu-idle support for i.MX8QXP, since different
platforms have different cpu-idle latency value, so move the
cpu-idle node to platform dtsi.
Add GPT as platform broadcast timer, its clock and power are
managed in TF-A.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi index 2a2f155027c6..2af53ca7afc9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8-ca35.dtsi @@ -28,6 +28,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; A35_1: cpu@1 { @@ -36,6 +37,7 @@ reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; A35_2: cpu@2 { @@ -44,6 +46,7 @@ reg = <0x0 0x2>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; A35_3: cpu@3 { @@ -52,6 +55,7 @@ reg = <0x0 0x3>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; }; A35_L2: l2-cache0 { |