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authorRichard Zhu <hongxing.zhu@nxp.com>2018-10-31 16:21:05 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:34:52 +0800
commit61de2e63f4777191e8d074afb338e702c969783f (patch)
tree03f6d8447cc03ca79ddbaf6888c2781ecf788830 /arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts
parent69a665d9e963571e545f1c35429c1819f7d4f1d6 (diff)
MLK-20142-1 ARM64: dts: use internal pll as pcie ref on 8mm ddr4 board
Since the 8mm ddr4 evk board is same to the -revb evk board. Configure the pcie ref clk as the internal pll clock. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts
index 1e3459899ded..ee54c1c64c12 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr4-evk.dts
@@ -50,3 +50,13 @@
&flexspi {
status = "disabled";
};
+
+/*
+ * External OSC is used as PCIe REFCLK on RevC board.
+ * DDR4 board is same to the RevB board, configure
+ * PCIe REFCLK to internal PLL.
+ */
+&pcie0{
+ ext_osc = <0>;
+ status = "okay";
+};