diff options
| author | Viorel Suman <viorel.suman@nxp.com> | 2018-08-16 14:47:38 +0300 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:33:28 +0800 |
| commit | 8212a03fcd09bc78cd3699efef2e89f76b6dc4d4 (patch) | |
| tree | ae0590a68afaf9bdae70a47892870e863a5f034a /arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts | |
| parent | 446bed3151164159f9165745180886393e58a053 (diff) | |
MLK-19154-5: ARM64: dts: imx8mm-evk: specify spdif pll8k and pll11k clocks
In imx8mm-evk DTS both AUDIO PLL rates are configured, so SPDIF1
pll8k and pll11k clocks can be set accordingly.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 4ee8ed7f91ebc96ee398ec1382fac738d79cfe6c)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts index 6f94ac65e621..32fe49117b99 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts @@ -866,6 +866,14 @@ <&clk IMX8MM_CLK_SPDIF1_DIV>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; assigned-clock-rates = <0>, <24576000>; + clocks = <&clk IMX8MM_CLK_AUDIO_AHB_DIV>, <&clk IMX8MM_CLK_24M>, + <&clk IMX8MM_CLK_SPDIF1_DIV>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_AUDIO_AHB_DIV>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", + "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k"; status = "okay"; }; |