diff options
| author | Han Xu <han.xu@nxp.com> | 2018-05-24 16:05:06 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:26 +0800 |
| commit | c842e5be38633a0ab27477f02e84fcb028f93401 (patch) | |
| tree | 0c875dfb942404b6b2f610a9d94b134eb5a5dd3b /arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts | |
| parent | 18d40eda81409a31359b05546c898fee59600abc (diff) | |
MLK-18396-1: arm64: dts: Add FSPI in i.MX8MM EVK DT
Add FlexSPI in i.MX8MM EVK device tree
Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts index 4bb3492d662d..2ac3eafa671b 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts @@ -157,6 +157,17 @@ >; }; + pinctrl_flexspi0: flexspi0grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 + MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 @@ -435,6 +446,21 @@ }; }; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + flash0: mt25qu256aba@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,mt25qu256aba"; + spi-max-frequency = <29000000>; + spi-nor,ddr-quad-read-dummy = <8>; + }; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; |