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authorMirela Rabulea <mirela.rabulea@nxp.com>2018-06-14 17:14:48 +0300
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:32:12 +0800
commita75e3e008b3aff28e15cbd2cda5483c739cb595d (patch)
treef0b37941d183c8b9c07a29fbf74108837ce37ab3 /arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts
parente1b82f0cea6d22b1ec92ac6d22f44538f5a9d1d2 (diff)
MLK-18607: arm64: dts: Add dual camera support for imx8mq-evk rev B4
Update ov5640 camera nodes in fsl-imx8mq-evk.dts to match for B4 revision, the two cameras are on separate i2c buses. Create fsl-imx8mq-evk-b3.dts to be used with old B3 revision, here include the B4 dtb, but override the ov5640 camera nodes, to use different i2c addresses on the same i2c bus. Rev B4 tested with HDMI 1920x1080 and fsl-imx8mq-evk.dtb. Rev B3 tested with HDMI 1920x1080 and fsl-imx8mq-evk-b3.dtb. Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> Reviewed-by: Robert Chiras <robert.chiras@nxp.com>, Robby Cai <robby.cai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts70
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts
new file mode 100644
index 000000000000..9ad6754790e6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-b3.dts
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2018 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8mq-evk.dts"
+
+/delete-node/ &ov5640_mipi;
+/delete-node/ &ov5640_mipi2;
+
+&i2c1 {
+ ov5640_mipi: ov5640_mipi@1c {
+ compatible = "ovti,ov5640_mipi";
+ reg = <0x1c>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_csi1_pwn>, <&pinctrl_csi_rst>;
+ clocks = <&clk IMX8MQ_CLK_CLKO2_DIV>;
+ clock-names = "csi_mclk";
+ assigned-clocks = <&clk IMX8MQ_CLK_CLKO2_SRC>,
+ <&clk IMX8MQ_CLK_CLKO2_DIV>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_200M>;
+ assigned-clock-rates = <0>, <20000000>;
+ csi_id = <0>;
+ pwn-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ mclk = <20000000>;
+ mclk_source = <0>;
+ port {
+ ov5640_mipi1_ep: endpoint {
+ remote-endpoint = <&mipi1_sensor_ep>;
+ };
+ };
+ };
+
+ ov5640_mipi2: ov5640_mipi2@2c {
+ compatible = "ovti,ov5640_mipi";
+ reg = <0x2c>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_csi2_pwn>;
+ clocks = <&clk IMX8MQ_CLK_CLKO2_DIV>;
+ clock-names = "csi_mclk";
+ assigned-clocks = <&clk IMX8MQ_CLK_CLKO2_SRC>,
+ <&clk IMX8MQ_CLK_CLKO2_DIV>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_200M>;
+ assigned-clock-rates = <0>, <20000000>;
+ csi_id = <1>;
+ pwn-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ mclk = <20000000>;
+ mclk_source = <0>;
+ port {
+ ov5640_mipi2_ep: endpoint {
+ remote-endpoint = <&mipi2_sensor_ep>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "disabled";
+};