MLK-19652 ARM64: dts: imx8mq-evk: add touch and mipi-hdmi support for both B4 and B3 board

For imx8mq-evk board, B4 board change touch/mipi-hdmi connected i2c bus from i2c1 to i2c3.
So this patch make the touch and mipi-hdmi work for both B4 and B3 board.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

1 files changed, 2 insertions, 124 deletions

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dts
index 1c58b7df2c15..02467af735f5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dts
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -13,126 +13,4 @@
  */
 
 #include "fsl-imx8mq-evk.dts"
-
-&hdmi {
-	status = "disabled";
-};
-
-&dcss {
-	status = "okay";
-	disp-dev = "mipi_disp";
-
-	clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
-		 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
-		 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
-		 <&clk IMX8MQ_CLK_DC_PIXEL_DIV>,
-		 <&clk IMX8MQ_CLK_DUMMY>,
-		 <&clk IMX8MQ_CLK_DISP_DTRC_DIV>;
-	clock-names = "apb", "axi", "rtrm", "pix_div", "pix_out", "dtrc";
-
-	assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>,
-			  <&clk IMX8MQ_CLK_DISP_AXI_SRC>,
-			  <&clk IMX8MQ_CLK_DISP_RTRM_SRC>,
-			  <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
-			  <&clk IMX8MQ_CLK_DISP_RTRM_PRE_DIV>,
-			  <&clk IMX8MQ_VIDEO_PLL1>;
-	assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
-				 <&clk IMX8MQ_SYS1_PLL_800M>,
-				 <&clk IMX8MQ_SYS1_PLL_800M>,
-				 <&clk IMX8MQ_CLK_25M>;
-	assigned-clock-rates = <600000000>,
-			       <800000000>,
-			       <400000000>,
-			       <0>,
-			       <400000000>,
-			       <599999999>;
-
-	dcss_disp0: port@0 {
-		reg = <0>;
-
-		dcss_disp0_mipi_dsi: mipi_dsi {
-			remote-endpoint = <&mipi_dsi_in>;
-		};
-	};
-};
-
-&mipi_dsi_phy {
-	status = "okay";
-};
-
-&mipi_dsi {
-	status = "okay";
-	assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
-			  <&clk IMX8MQ_CLK_DSI_CORE_SRC>,
-			  <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
-			  <&clk IMX8MQ_VIDEO_PLL1>;
-	assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
-				 <&clk IMX8MQ_SYS1_PLL_266M>,
-				 <&clk IMX8MQ_CLK_25M>;
-	assigned-clock-rates = <24000000>,
-			       <266000000>,
-			       <0>,
-			       <599999999>;
-
-	port@1 {
-		mipi_dsi_in: endpoint {
-			remote-endpoint = <&dcss_disp0_mipi_dsi>;
-		};
-	};
-
-};
-
-&mipi_dsi_bridge {
-	status = "okay";
-
-	panel@0 {
-		compatible = "raydium,rm67191";
-		reg = <0>;
-		pinctrl-0 = <&pinctrl_mipi_dsi_en>;
-		reset-gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>;
-		dsi-lanes = <4>;
-		panel-width-mm = <68>;
-		panel-height-mm = <121>;
-		port {
-			panel1_in: endpoint {
-				remote-endpoint = <&mipi_dsi_bridge_out>;
-			};
-		};
-	};
-
-	port@2 {
-		mipi_dsi_bridge_out: endpoint {
-			remote-endpoint = <&panel1_in>;
-		};
-	};
-};
-
-&iomuxc {
-	imx8mq-evk {
-		pinctrl_mipi_dsi_en: mipi_dsi_en {
-			fsl,pins = <
-				MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6	0x16
-			>;
-		};
-
-		pinctrl_i2c1_synaptics_dsx_io: synaptics_dsx_iogrp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_ECSPI1_MOSI_GPIO5_IO7              0x19
-			>;
-		};
-
-	};
-};
-
-&i2c1 {
-	synaptics_dsx_ts@20 {
-		compatible = "synaptics_dsx";
-		reg = <0x20>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c1_synaptics_dsx_io>;
-		interrupt-parent = <&gpio5>;
-		interrupts = <7 8>;
-		synaptics,diagonal-rotation;
-		status = "okay";
-	};
-};
+#include "fsl-imx8mq-evk-dcss-rm67191.dtsi"