diff options
| author | Abel Vesa <abel.vesa@nxp.com> | 2018-10-17 15:04:36 +0300 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:41 +0800 |
| commit | 2c845e3f83b58a995f9037c4c171257f153950e2 (patch) | |
| tree | 91394c14ebb2ccaa09eee1d7c17cefaf41c9ef17 /arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi | |
| parent | 8e8f2fb3abf0375b4329f989490bf6cf9c308fc4 (diff) | |
MLK-19966 arm64: imx8mq: Fix assigned clocks order in rm67191 dtsi
This fixes the wrongly ordering of assigned clocks for dcss.
Fixes: 4db22d33851f8401 ("clk: imx8mq: Switch to newly added composite-8m clock")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reported-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi index 969be8208a9d..ef6267660ce7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-rm67191.dtsi @@ -36,8 +36,8 @@ assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>, <&clk IMX8MQ_CLK_DISP_AXI>, - <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_CLK_DISP_RTRM>, + <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_VIDEO_PLL1>; assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>, <&clk IMX8MQ_SYS1_PLL_800M>, |