diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2017-11-27 17:14:26 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:29:39 +0800 |
| commit | 44758208d62bcf7cca9c69a3ccf74ebddde348f1 (patch) | |
| tree | 8a95f86da7820d861360c9201a0ea729166d12c4 /arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts | |
| parent | 9b56bdc06de1913d6b681ebbff167c63c7680592 (diff) | |
MLK-16926-4: arm64: dts: fsl-imx8mq-evk: Add sync polarity for LCDIF use-cases
For some reasons, the sync polarity of the eLCDIF when used with NWL DSI
controller needs to be HIGH, so set it in the DTS nodes.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts index 47398833c029..133ace3caf2c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts @@ -72,6 +72,7 @@ &mipi_dsi { status = "okay"; as_bridge; + sync-pol = <1>; port@1 { mipi_dsi_in: endpoint { |