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authorLiu Ying <victor.liu@nxp.com>2018-05-28 10:41:12 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:33:40 +0800
commit199c54f8f55a772248b9a2d5bfc1e88aa408644d (patch)
tree66dff614992779f9bbe785649c8136cc8e8f721e /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
parentd021eabcd792859af2c76404f4141dd3cc41c435 (diff)
MLK-19413-2 arm64: fsl-imx8qm.dtsi: Add pixel combiner support
This patch adds pixel combiner nodes support for i.MX8qm DT file and hooks the pixel combiner nodes to the DPU nodes. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
index 512c2fe22c71..6cb431392c34 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
@@ -1537,6 +1537,13 @@
reg = <0x0 0x56000000 0x0 0x10000>;
};
+ pixel_combiner1: pixel-combiner@56020000 {
+ compatible = "fsl,imx8qm-pixel-combiner";
+ reg = <0x0 0x56020000 0x0 0x10000>;
+ power-domains = <&pd_dc0>;
+ status = "disabled";
+ };
+
prg1: prg@56040000 {
compatible = "fsl,imx8qm-prg";
reg = <0x0 0x56040000 0x0 0x10000>;
@@ -1744,6 +1751,7 @@
fsl,dpr-channels = <&dpr1_channel1>, <&dpr1_channel2>,
<&dpr1_channel3>, <&dpr2_channel1>,
<&dpr2_channel2>, <&dpr2_channel3>;
+ fsl,pixel-combiner = <&pixel_combiner1>;
status = "disabled";
dpu1_disp0: port@0 {
@@ -2045,6 +2053,13 @@
reg = <0x0 0x57000000 0x0 0x10000>;
};
+ pixel_combiner2: pixel-combiner@57020000 {
+ compatible = "fsl,imx8qm-pixel-combiner";
+ reg = <0x0 0x57020000 0x0 0x10000>;
+ power-domains = <&pd_dc1>;
+ status = "disabled";
+ };
+
prg10: prg@57040000 {
compatible = "fsl,imx8qm-prg";
reg = <0x0 0x57040000 0x0 0x10000>;
@@ -2252,6 +2267,7 @@
fsl,dpr-channels = <&dpr3_channel1>, <&dpr3_channel2>,
<&dpr3_channel3>, <&dpr4_channel1>,
<&dpr4_channel2>, <&dpr4_channel3>;
+ fsl,pixel-combiner = <&pixel_combiner2>;
status = "disabled";
dpu2_disp0: port@0 {