diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-09-06 11:07:10 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-02-12 11:06:04 +0100 |
| commit | 53c463855becfae40f8689a47826cc54b6836e48 (patch) | |
| tree | c658b89906dd0b51ef050c3f2005233e3a39e8dc /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 45948afbcb5b31bedf378d900b21434d06a86702 (diff) | |
fsl-imx8qm-device.dtsi: replace hardcoded values
Use GIC_SPI (which is defined as 0) instead of the hardcoded value 0.
Use IRQ_TYPE_LEVEL_HIGH (which is defined as 4) instead of the hardcoded value 4.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index f8f17c9ed99b..06f65bb13239 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -4163,10 +4163,10 @@ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &gic 0 73 4>, - <0 0 0 2 &gic 0 74 4>, - <0 0 0 3 &gic 0 75 4>, - <0 0 0 4 &gic 0 76 4>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_pcie1>; fsl,max-link-speed = <3>; hsio-cfg = <PCIEAX1PCIEBX1SATA>; @@ -4205,10 +4205,10 @@ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &gic 0 105 4>, - <0 0 0 2 &gic 0 106 4>, - <0 0 0 3 &gic 0 107 4>, - <0 0 0 4 &gic 0 108 4>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_pcie1>; fsl,max-link-speed = <3>; hsio-cfg = <PCIEAX1PCIEBX1SATA>; |