diff options
| author | Oliver Brown <oliver.brown@nxp.com> | 2018-08-02 07:51:26 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:33:10 +0800 |
| commit | 546972ba880cb00dbc306a8a8817391f97106eb5 (patch) | |
| tree | c125a4ab4cb85bf71fd01b703ded7854719c86a8 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | a142277eb26217ec0cf455d907a2f82ea62391c3 (diff) | |
MLK-19119 arm64: dts: imx8qm: Correct bus clock for HDMI Interrupt Steer
The Local Interrupt Steer Clock Bus Clock (LIS IPG) should be 83.375 MHz.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index be75f8cf2ad3..64e703b41fb8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -2707,7 +2707,7 @@ clock-names = "ipg"; assigned-clocks = <&clk IMX8QM_HDMI_DIG_PLL_CLK>, <&clk IMX8QM_HDMI_LIS_IPG_CLK>; - assigned-clock-rates = <675000000>, <85000000>; + assigned-clock-rates = <675000000>, <84375000>; power-domains = <&pd_hdmi>; }; |