diff options
| author | Daniel Baluta <daniel.baluta@nxp.com> | 2018-05-23 11:29:01 +0300 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:33:16 +0800 |
| commit | 9b5b13686b8fe619aa3f78de4957860c67e91ae0 (patch) | |
| tree | 8b42eea2b3a66ee62d733f3e32ccb5857617537c /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 39d79e88cd1076a041cb8798bde0fb8346c25293 (diff) | |
MLK-17481-2: ARM64: dts: imx8qm: Enable DSP
i.mx8QM B0 comes with a DSP (placed in the VPU unit).
From the ARM core side DSP local memory (Inst/Data) is mapped at
0x55000000-0x55FFFFFF range.
DSP also uses code located in SDRAM mapping starting at 0x92400000.
While at it, move rpmsg_node up in order to have all reserved
areas sorted by address.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 1eb4b2ee64c6f1fd7a5d6ceb1f019e876dbdfeb9)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 64e703b41fb8..b1066c84987c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -902,6 +902,35 @@ }; }; }; + + pd_dsp_mu_A: PD_DSP_MU_A { + reg = <SC_R_MU_13A>; + #power-domain-cells = <0>; + power-domains =<&pd_audio>; + #address-cells = <1>; + #size-cells = <0>; + + pd_dsp_mu_B: PD_DSP_MU_B { + reg = <SC_R_MU_13B>; + #power-domain-cells = <0>; + power-domains =<&pd_dsp_mu_A>; + #address-cells = <1>; + #size-cells = <0>; + + pd_dsp_ram: PD_AUD_OCRAM { + reg = <SC_R_DSP_RAM>; + #power-domain-cells = <0>; + power-domains =<&pd_dsp_mu_B>; + #address-cells = <1>; + #size-cells = <0>; + pd_dsp: PD_AUD_DSP { + reg = <SC_R_DSP>; + #power-domain-cells = <0>; + power-domains =<&pd_dsp_ram>; + }; + }; + }; + }; }; pd_dma: PD_DMA { @@ -3606,6 +3635,18 @@ status = "disabled"; }; + dsp: dsp@556e8000 { + compatible = "fsl,imx8qxp-dsp"; + reserved-region = <&dsp_reserved>; + reg = <0x0 0x556e8000 0x0 0x88000>; + clocks = <&clk IMX8QM_AUD_DSP_IPG>, + <&clk IMX8QM_AUD_OCRAM_IPG>, + <&clk IMX8QM_AUD_DSP_CORE_CLK>; + clock-names = "ipg", "ocram", "core"; + fsl,dsp-firmware = "imx/dsp/hifi4.bin"; + power-domains = <&pd_dsp>; + }; + esai0: esai@59010000 { compatible = "fsl,imx8qm-esai"; reg = <0x0 0x59010000 0x0 0x10000>; |